Optical Characterization of Silicon-On-Insulator

1996 ◽  
Vol 446 ◽  
Author(s):  
G. G. Li ◽  
A. R. Forouhi ◽  
I. Bloomer ◽  
A. Auberton-Herve ◽  
A. Wittkower
Keyword(s):  
Optical Constants ◽  
Crystalline Silicon ◽  
Interface Roughness ◽  
Silicon On Insulator ◽  
Native Oxide ◽  
Buried Oxide ◽  
A New Technique ◽  
Silicon Islands ◽  
Destructive Measurement ◽  
Non Destructive

AbstractA new technique, referred to as the “n&k Method”, is used to characterize the thin films comprising Silicon-on-Insulator (SOI). With the “n&k Method”, a non-destructive robust measurement of the thickness of both the crystalline silicon top-layer and the buried oxide under-layer, the spectra of refractive index (n), and extinction coefficient (k), and the smoothness of the interfaces is established. The “n&k Method” determines these quantities simultaneously and without multiple solutions for thickness. The non-destructive measurement of interface roughness between the buried oxide under-layer and the silicon substrate is associated with the presence of silicon islands. The native oxide that forms on SOI is also detected and measured. No initial user's input for thickness and optical constants are required in order to obtain these results. The spectra of optical constants are measured accurately and reliably.

Measuring thicknesses of native oxide, crystalline-silicon, and buried oxide layers and the interface roughnesses of SOI

2000 ◽  
Author(s):  
Iris Bloomer ◽  
George G. Li ◽  
A. Rahim Forouhi ◽  
A. Auberton-Herve ◽  
Andrew Wittkower
Keyword(s):  
Crystalline Silicon ◽  
Native Oxide ◽  
Oxide Layers ◽  
Buried Oxide

Pattern-induced alignment of silicon islands on buried oxide layer of silicon-on-insulator structure

2003 ◽  
Vol 83 (15) ◽  
pp. 3162-3164 ◽  
Author(s):  
Yasuhiko Ishikawa ◽  
Yasuhiro Imai ◽  
Hiroya Ikeda ◽  
Michiharu Tabe
Keyword(s):  
Oxide Layer ◽  
Silicon On Insulator ◽  
Buried Oxide ◽  
Silicon Islands

Growth of Oxygen Precipitates in Low-Dose Low-Energy Simox

2001 ◽  
Vol 7 (S2) ◽  
pp. 562-563
Author(s):  
Jun Sik Jeoung ◽  
Benedict Johnson ◽  
Suṗapan Seraphin
Keyword(s):  
Circuit Design ◽  
Low Dose ◽  
Ostwald Ripening ◽  
Crystalline Silicon ◽  
Silicon On Insulator ◽  
Electronic Components ◽  
Buried Oxide ◽  
Implantation Temperature ◽  
Oxygen Precipitates ◽  
Reduced Power Consumption

Silicon-on-insulator (SOI) is becoming a key technology for low power electronics due to substantially reduced power consumption of electronic components, and a capability of compact circuit design which are not readily achievable in bulk silicon technology [1]. Separation by IMplantation of OXygen (SIMOX) is the most promising technology for fabricating SOI material. The basic SIMOX process consists of implantation of oxygen into the single crystalline silicon wafer and the subsequent high temperature annealing. Oxygen implantation at low doses does not form a continuous buried oxide (BOX) layer but leads to an inhomogeneous distribution of the oxygen precipitates during implantation process. The formation and growth of oxygen precipitates in low-dose SIMOX depend strongly on the implantation conditions such as oxygen dose, implantation temperature, annealing temperature and ramping rate [2,3]. During the subsequent annealing, Ostwald ripening of the precipitates takes place and the larger precipitates grow at the expanse of small ones until they coalesce to the buried oxide layer.

Fabrication of Device-grade Separation-by-implantation-of-oxygen Materials by Optimizing Dose-energy Match

2002 ◽  
Vol 17 (7) ◽  
pp. 1634-1643 ◽  
Author(s):  
Meng Chen ◽  
Yuehui Yu ◽  
Xi Wang ◽  
Xiang Wang ◽  
Jing Chen ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Silicon On Insulator ◽  
Optimum Dose ◽  
Cross Sectional ◽  
Buried Oxide ◽  
Transmission Electron ◽  
Good Crystallinity ◽  
Grade Separation ◽  
Silicon Islands

In this article, we report formation of separation-by-implantation-of-oxygen (SIMOX) silicon-on-insulator (SOI) materials with doses ranging from (2.5 to 13.5) × 1017 cm−2 at acceleration energies of 70–160 keV and subsequent annealing at temperatures over 1300 °C in oxygen + argon atmosphere for 5 h. The microstructure evolution of SIMOX wafers was characterized by Rutherford backscattering spectroscopy, cross-sectional transmission electron microscopy, high-resolution transmission electron microscopy, Secco, and Cu-plating. This study revealed a series of good matches of dose-energy combination at acceleration energies of 70–160 keV with doses of (2.5–5.5) × 1017 cm−2, in which SIMOX wafers had good crystallinity of the top silicon, sharp Si/SiO2 interfaces, high-integrity buried oxide layers with low pinhole density, and low detectable silicon islands. Furthermore, the higher the oxygen dose, the higher the implanted energy required for the formation of a buried oxide free from Si islands. The mechanism of the optimum dose-energy match is discussed.

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

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