A Low‐Thermal‐Budget In Situ Doped Multilayer Silicon Epitaxy Process for MOSFET Channel Engineering

1999 ◽  
Vol 146 (3) ◽  
pp. 1189-1196 ◽  
Author(s):  
Ibrahim Ban ◽  
Mehmet C. Öztürk ◽  
Veena Misra ◽  
Jimmie J. Wortman ◽  
Dave Venables ◽  
...  
Keyword(s):  
Thermal Budget ◽  
Silicon Epitaxy ◽  
Channel Engineering ◽  
Low Thermal Budget

Low thermal budget in situ cleaning and passivation for silicon epitaxy in a multichamber rapid thermal processing cluster tool

1994 ◽  
Vol 21 (2) ◽  
pp. 137-141 ◽  
Author(s):  
Mahesh K. Sanganeria ◽  
Katherine E. Violette ◽  
Mehmet C. Öztürk ◽  
Gari Harris ◽  
C.Archie Lee ◽  
...  
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Thermal Budget ◽  
Silicon Epitaxy ◽  
Low Thermal Budget ◽  
Cluster Tool

Demonstration of Multiprocessing by Silicon Epitaxy Following In-Situ Cleaning

1991 ◽  
Vol 224 ◽  
Author(s):  
Pushkar P. Apte ◽  
Ramnath Venkatraman ◽  
Krishna C. Saraswat ◽  
Mehrdad M. Moslehi ◽  
Richard Yeakley
Keyword(s):  
Semiconductor Manufacturing ◽  
Single Crystal Silicon ◽  
Chemical Vapor ◽  
Crystal Silicon ◽  
Silicon Epitaxy ◽  
Anhydrous Hydrogen Fluoride ◽  
Manufacturing Techniques ◽  
Specific Manifestation ◽  
Low Thermal Budget

AbstractConventional semiconductor manufacturing techniques may be unable to meet technological demands in certain cases, and alternatives need to be investigated. We propose in situ sequential processing, which we define as ‘multiprocessing’, as a possible innovation. We demonstrate a specific manifestation of multiprocessing, namely the integration of a novel in situ pre-clean using anhydrous hydrogen fluoride with chemical vapor deposition of silicon, leading to the growth of high-quality single-crystal silicon epitaxy. Further, we show that the multiprocessing technology is viable for manufacturing, since it is simple, rapid, has a low thermal budget and does not suffer from cross-contamination. Finally, we discuss the possible role of multiprocessing in semiconductor manufacturing.

Enabling n-type polycrystalline Ge junctionless FinFET of low thermal budget by in situ doping of channel and visible pulsed laser annealing

2017 ◽  
Vol 10 (2) ◽  
pp. 026502 ◽  
Author(s):  
Wen-Hsien Huang ◽  
Jia-Min Shieh ◽  
Ming-Hsuan Kao ◽  
Chang-Hong Shen ◽  
Tzu-En Huang ◽  
...  
Keyword(s):  
Laser Annealing ◽  
Pulsed Laser ◽  
Thermal Budget ◽  
Pulsed Laser Annealing ◽  
Low Thermal Budget

Carbon Doped Silicon Emitters Fabricated Using Limited Reaction Processing

1990 ◽  
Vol 198 ◽  
Author(s):  
F.H. Ruddell ◽  
B.M. Armstrong ◽  
H.S. Gamble ◽  
K.B. Affolter ◽  
P.B. Moynagh ◽  
...  
Keyword(s):  
Deposition Process ◽  
Bipolar Transistors ◽  
Tem Analysis ◽  
Thermal Budget ◽  
Carbon Doped ◽  
Analysis Techniques ◽  
Doped Silicon ◽  
Low Thermal Budget ◽  
Reaction Processing

ABSTRACTThis paper describes the deposition of in-situ doped N-type silicon carbide layers in a Limited Reaction Processing (LRP) reactor. Silane/propane/ phosphine gas chemistry was used at temperatures less than 1000°C and SIMS, XPS and TEM analysis techniques aided layer characterisation. A low thermal budget deposition process (1 min at 970°C) was employed to form the emitters of Sic/Si heterojunction NPN bipolar transistors. These devices yielded a factor of two increase in emitter Gummel number compared to diffused emitters.

Sign in / Sign up

Export Citation Format

Share Document