Low Thermal Budget In Situ Surface Cleaning for Selective Silicon Epitaxy
1998 ◽
Vol 145
(10)
◽
pp. 3602-3609
◽
A Low‐Thermal‐Budget In Situ Doped Multilayer Silicon Epitaxy Process for MOSFET Channel Engineering
1999 ◽
Vol 146
(3)
◽
pp. 1189-1196
◽
Keyword(s):
2001 ◽
Vol 226
(4)
◽
pp. 443-450
◽
2000 ◽
Vol 44
(3)
◽
pp. 549-554
◽
Keyword(s):