Suppression of boron penetration in p/sup +/ polysilicon gate P-MOSFETs using low-temperature gate-oxide N/sub 2/O anneal

1994 ◽  
Vol 15 (3) ◽  
pp. 109-111 ◽  
Author(s):  
Z.J. Ma ◽  
J.C. Chen ◽  
Z.H. Liu ◽  
J.T. Krick ◽  
Y.C. Cheng ◽  
...  
Keyword(s):  
Low Temperature ◽  
Gate Oxide ◽  
Polysilicon Gate ◽  
Boron Penetration

Low temperature operation of ultra-thin gate oxide sub-0.1 μm MOSFETs

2002 ◽  
Vol 12 (3) ◽  
pp. 57-60 ◽  
Author(s):  
B. Cretu ◽  
F. Balestra ◽  
G. Ghibaudo ◽  
G. Guégan
Keyword(s):  
Low Temperature ◽  
Gate Oxide ◽  
Thin Gate Oxide

Reliability of Low Temperature Polycrystalline Silicon Thin-Film Transistors with Ultrathin Gate Oxide

2007 ◽  
Vol 46 (7A) ◽  
pp. 4021-4027 ◽  
Author(s):  
Hitoshi Ueno ◽  
Yuta Sugawara ◽  
Hiroshi Yano ◽  
Tomoaki Hatayama ◽  
Yukiharu Uraoka ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Gate Oxide ◽  
Silicon Thin Film

Stability of Ultra-Thin Gate Oxides with Boron Doped Polysilicon Gate Structures After Rapid Thermal Annealing

1993 ◽  
Vol 303 ◽  
Author(s):  
Bojun Zhang ◽  
Dennis M. Maher ◽  
Mark S. Denker ◽  
Mark A. Ray
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Depth Profiling ◽  
Gate Oxide ◽  
Annealing Condition ◽  
Dopant Diffusion ◽  
Boron Diffusion ◽  
Gate Oxides ◽  
Diffusion Behavior ◽  
Polysilicon Gate

ABSTRACTWe report a systematic study of dopant diffusion behavior for thin gate oxides and polysilicon implanted gate structures. Boron behavior is emphasized and its behavior is compared to that of As+ and BF2+. Dopant activation is achieved by rapid thermal annealing. Test structures with 100 Å, 60 Å and 30 Å gate oxides and ion implanted polysilicon gate electrodes were fabricated and characterized after annealing by SIMS, SEM, TEM, and C-V rpeasurements. For arsenic implanted structures, no dopant diffusion through a gate oxide of 30 Å thickness and an annealing condition as high as 1 100*C/1Os was observed. For boron implanted structures, as indicated by SIMS depth profiling, structures annealed at 1000*C/10s exhibit a so-called critical condition for boron diffusion through a 30 Å gate oxide. Boron dopant penetration is clearly observed for 60 Å gate oxides at an annealing condition of 1050 0C/10s. The flatband voltage shift can be as high as 0.56 volts as indicated by C-V measurements for boron penetrated gate oxides. However, 100 Å gate oxides are good diffusion barriers for boron at an annealing condition of 1100°C/10s. For BF2 implanted structures, the diffusion behavior is consistent with behavior reported in the literature.

Improved reliability of low-temperature polysilicon TFT by post-annealing gate oxide

2003 ◽  
Vol 24 (3) ◽  
pp. 174-176 ◽  
Author(s):  
Seok-Woo Lee ◽  
Eugene Kim ◽  
Sang-Soo Han ◽  
Hye Sun Lee ◽  
Duk-Chul Yun ◽  
...  
Keyword(s):  
Low Temperature ◽  
Gate Oxide ◽  
Post Annealing ◽  
Polysilicon Tft

Compatibility of POCl3 Gate Process with the Fabrication of Vertical 4H-SiC MOSFETs

2020 ◽  
Vol 1004 ◽  
pp. 565-570
Author(s):  
Tomokatsu Watanabe ◽  
Munetaka Noguchi ◽  
Shingo Tomohisa ◽  
Naruhisa Miura
Keyword(s):  
Thermal Treatment ◽  
Low Temperature ◽  
Negative Charge ◽  
Charge Trapping ◽  
Gate Oxide ◽  
Device Fabrication ◽  
Post Processing ◽  
Production Lines ◽  
Channel Mobility ◽  
Device Operation

We used the POCl3 gate technique for the fabrication of 4H-SiC vertical MOSFETs, and examined its effect on the VTH-RON tradeoff and the compatibility with device fabrication. The gate oxide film was formed by thermal dry O2 oxidation followed by POCl3 or NO annealing. The POCl3 process reduced RON by about 30% compared with the NO process for the ones having VTH of 1.1 V, being attributed to the channel mobility enhancement. Moreover, the improvement was more effective for higher VTH designs. The conventional thermal treatment after the gate process considerably spoiled the channel mobility improvement brought by the POCl3 annealing and strengthened negative charge trapping in the gate oxide. The presumed extra-formed defects also affected the EOX dependence of tBD on the TDDB tests, being expected to shorten the gate oxide lifetime under practical device operation stress. Successful insertion of the POCl3 process into production lines depends upon careful low-temperature post processing.

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