System-Level Transient Thermal Analysis for Performance Optimization of High Power Microelectronics

2003 ◽  
Author(s):  
Victor Adrian Chiriac ◽  
Tien-Yu Tom Lee ◽  
H. S. Chen
Keyword(s):  
Thermal Performance ◽  
Performance Optimization ◽  
Numerical Study ◽  
Optimal Operation ◽  
System Level ◽  
Main Concern ◽  
Efficient Operation ◽  
Normal Test ◽  
Transient Thermal ◽  
Short Time

The increasing trend in power levels and densities leads to the need of design thermal optimization, at either module or system level. A numerical study using finite-volume software was conducted to model the transient thermal behavior of a system including a package dissipating large amounts of power over short time durations. The system is evaluated by choosing the appropriate heat sink for the efficient operation of the device under 100W of constant powering, also to enhance the thermal performance of the enclosure/box containing the test stack-up. The intent of the study is to provide a meaningful understanding and prediction of the high transient powering scenarios. The study focuses on several powering and system design scenarios, identifying the main issues encountered during a normal device operation. The power source dissipates 100W for 2 seconds then is cooled for another 2 seconds. This thermal cycle is likely to occur several times during a normal test-up, and it is the main concern of the manufacturers not to exceed a limit temperature during the device testing operation. The transient trend is further extrapolated analytically to extract the steady state peak temperature values, in order to maintain the device peak temperatures below 120°C. The benefit of the study is related to the possibility to extract the maximum/minimum temperatures for a real test involving a large number of heating-cooling cycles, yet maintaining the initial and peak temperatures within a certain range, for the optimal operation of the device. The flow and heat transfer fields are thoroughly investigated. By using a combination of numerical and analytical study, the thermal performance of the device undergoing infinity of periodic thermal cycles is further predicted.

Steady-State and Transient Thermal Performance Optimization of Power Automotive Modules

2009 ◽  
Author(s):  
Victor Chiriac
Keyword(s):  
Steady State ◽  
Thermal Performance ◽  
Numerical Study ◽  
Peak Temperature ◽  
System Level ◽  
Main Concern ◽  
Thermal Impact ◽  
Automotive Applications ◽  
Isothermal Boundary ◽  
Transient Thermal

An extensive 3-D conjugate numerical study is conducted to assess the thermal performance of power packages for automotive applications. The automotive industry deals on a daily basis with various package and module-level thermal issues when managing the routing of very high current. The study provides a better understanding of the strengths and weaknesses of IC incorporation into a system module, for present and future product development. Several packages are investigated, ranging from smaller die/flag size to larger ones, single or multiple heat sources, operating under various powering and boundary conditions. The steady state and transient thermal impact of the thicker lead frame and die attach material on the overall thermal behavior is evaluated. The main concern is exceeding the thermal budget at an external ambient temperature of 85°C, specific for the relatively extreme automotive operating environments. Under one steady state (1W) operating scenario, the PQFN package reaches a peak temperature of ∼106.3°C, while under 37W@40ms of transient powering, the peak temperature reached by the corner FET is ∼260.8°C. With an isothermal boundary (85°C) attached to the board backside, the junction temperature does not change, as the PCB has no significant thermal impact. When the isothermal boundary is attached to package bottom, peak temperature drops by 20% after 40 ms. Additional system level with multiple optimized packages placed on a custom PCB is evaluated numerically and experimentally, placing an emphasis on the superior thermal performance of this new class of power packages for automotive applications. The optimized numerical model approximates closely the empirical results (121–126°C vs. 127.5°C), within 1–2%.

Advanced Cooling With Embedded Heat Pipes for High Power Microelectronics

2009 ◽  
Author(s):  
Victor Adrian Chiriac
Keyword(s):  
Heat Pipe ◽  
Thermal Performance ◽  
Heat Sink ◽  
Heat Pipes ◽  
Optimal Operation ◽  
Operating Conditions ◽  
Peak Temperature ◽  
Transient Temperature ◽  
Efficient Operation ◽  
The Impact

The transient thermal behavior of a complex testing system including multiple fans, a mixing enclosure, Cu inserts and a leaded package dissipating large amounts of power over short time durations is evaluated via numerical simulations. The system performance is optimized with heat sink/fan structure for device efficient operation under constant powering. The study provides meaningful understanding and prediction of a transient powering scenario at high powering levels, evaluating the impact of alternative cooling fan/heat pipe configurations on the thermal performance of the system. One design is chosen due to its effective thermal performance and assembly simplicity, with the package embedded in heat sink base with multiple (5) heat pipes. The peak temperature reached by the modified design with 4 cooling fans is ∼95°C, with the corresponding Rja thermal resistance ∼0.58°C/W. For the transient study (with embedded heat pipes and 4 fans), after one cycle, both peak temperature (at 45 s) and the end temperature (at 49 s) decrease as compared to the previous no heat pipe/single fan case (especially the end temperature reduces by ∼16%). The temperature drop between peak and end for each cycle is ∼80.2°C, while the average power per transient cycle is ∼31.27W. With this power, the design with 5 perpendicular heat pipes, 4 fans and insert reaches a steady state peak temperature of ∼98°C. Applying the superposition principle, the maximum transient temperature after a large number of operating cycles will not exceed ∼138.1°C, satisfying the thermal budget under the current operating conditions. The benefit of the study is related to the possibility to extract the maximum/minimum temperatures for a real test involving a large number of heating-cooling cycles, yet maintaining the initial and peak temperatures within a certain range for the optimal operation of the device. The flow and heat transfer fields are thoroughly investigated: using a combination of numerical and analytical study, the thermal performance of the device undergoing large number of periodic thermal cycles is predicted. Further comparison between measurement and simulation results reveals good agreement.

System Level Thermal Optimization of an Automotive Lightning Module Incorporating Several Power Devices

2007 ◽  
Author(s):  
Victor Chiriac ◽  
Tien-Yu Tom Lee
Keyword(s):  
Thermal Performance ◽  
Power Dissipation ◽  
Heat Dissipation ◽  
System Level ◽  
Total Power ◽  
Main Concern ◽  
Optimized Design ◽  
Passive Components ◽  
Thermal Budget ◽  
The Impact

The conjugate thermal performance of microelectronics module incorporating several power packages and additional passive components in a custom environment is evaluated and further optimized using numerical simulation and experimental validation. The automotive industry deals on a daily basis with multiple packaging and module-level thermal issues when reducing the size of components for a lightning system in a car, while managing the routing of very high current. The study provides a better understanding of the strengths and weaknesses of the IC incorporation into a system module level, for both present and future product development. The reference design is evaluated at a system level, and several improvements are identified to enhance the overall thermal performance of the lightning system. The main concern is related to the possibility of exceeding the thermal budget for a large system incorporating several PQFN (Power Quad Flat No-Lead Package) packages with additional heat dissipation devices in an enclosure, at an external ambient temperature of 85°C. Due to the compactness of the device, there are only limited solutions to extract the heat from the high power dissipation system. The impact on the thermal balance of the trace dissipation, the location and size of the pins connecting the two boards (motherboard and daughter board) forming the system, the header heating and other passive components under various powered conditions are evaluated. A revised model includes additional pins (reduced diameter), modified motherboard and harness structures and their locations; the impact of additional heater traces on both top and bottom surfaces of the motherboard, and a modified daughter board design, is also evaluated. The resulting peak temperatures range from 118.3°C to 137.3°C and the corresponding junction-to-ambient thermal resistances (Rja) vary from 8.4°C/W to 8.8°C/W. Rja is defined as the temperature difference between the peak device and ambient divided by the total power dissipation of the PQFN packages. An optimized design is further evaluated, with lowered thermal resistance from the motherboard, the board-to-board pins, the junction box board, and the wiring harness. The thermal budget is satisfied, as the peak temperatures reached by the two designs are below the 150°C limit. Additional experimental results are used to benchmark the simulation results, within 1–6% accuracy.

Thermal Performance Evaluation and Enhancement for an Automotive Wireless Application Incorporating Multiple Dynamic Heat Sources

2007 ◽  
Author(s):  
Victor Chiriac ◽  
Tien-Yu Tom Lee
Keyword(s):  
Thermal Performance ◽  
Signal Strength ◽  
Optimal Operation ◽  
Operating Conditions ◽  
Temperature Fields ◽  
Heat Sources ◽  
Thermal Budget ◽  
Dynamic Source ◽  
Power Sequence ◽  
Transient Thermal

A detailed transient thermal study for a Remote Keyless Entry System with dynamic heat sources is performed using numerical simulations. The SmartMOS-type device is packaged in a 54 lead SOIC (small outline IC) package with an exposed copper slug. The package is attached to a 4-layer PCB with thermal vias embedded in the board. The challenge resides in the transient thermal interaction between several dynamic heat sources (channels), activated in a sequential fashion following different powering profiles and patterns. The main purpose of the device is to wirelessly provide a communication path between the remote and the receiver placed in the car, so the distance and the signal strength between the two are paramount for an optimal operation. The signal strength is directly associated with the voltage (and associated powering) levels. Several operating scenarios are evaluated by modifying the system design (thermal via pattern) and varying both power dissipation and duration levels. The study starts with just one channel dissipating power, followed by activating the entire dynamic system comprised of six channels dissipating each powers reaching up to 22W at different time intervals. The transient thermal behavior of each source is analyzed during the process. Results indicate that the system dissipating over 14V exceeds the thermal budget (150C) after only 3 powering cycles. Based on the analysis of the complex temperature fields for the multiple dynamic source system, the authors identify alternative power profiles to improve the thermal performance of the overall wireless system, by splitting the power in selective channels and by modifying the power sequence. Several additional cases are further investigated, and the optimized power profiles indicate that they satisfy the thermal budget under various operating conditions and several multiple cycles, while still maintaining the device voltage at 14V levels. A thorough study of the transient patterns and needed system improvements are included.

Thermal Performance Optimization of Radio Frequency Packages for Wireless Communication

2004 ◽  
Vol 126 (4) ◽  
pp. 429-434 ◽  
Author(s):  
Victor Adrian Chiriac ◽  
Tien-Yu Tom Lee ◽  
Vern Hause
Keyword(s):  
Wireless Communication ◽  
Thermal Resistance ◽  
Thermal Performance ◽  
Performance Optimization ◽  
Numerical Study ◽  
Metal Layer ◽  
Peak Temperature ◽  
Junction Temperature ◽  
Board Structure ◽  
Die Attach

The increasing trend in power levels and associated densities leads to the need of design thermal optimization, either at the module level or at the system (module-board stack-up) level. The wireless communication industry is facing multiple challenges as it tries to promote smaller, faster and cost-effective packages, yet trying to cope with potential thermal bottlenecks. The present study investigates a family of packages, whose thermal and electrical performances are far superior to the classic (standard) packages. A three-dimensional conjugate numerical study was conducted to evaluate the thermal performance of gallium arsenic die packaged in quad flat no-lead (QFN) packages for various wireless and networking applications. Two different QFN packages are investigated: a standard package and a power package (PQFN) with thicker leadframe and solder die attach. The thermal impact of die attach material, leadframe thickness, die pad size, and board structure is evaluated and provides valuable information for product designers. Two powering scenarios are investigated: (1) one for standard operating parameters and (2) an alternative for extreme operating powering scenarios. Results indicate that the peak temperature reached on the die for 3×3 mm QFN under normal powering conditions is ∼138.5 °C (or 119 °C/W junction-to-air thermal resistance), while for the extreme scenario, the junction temperature is ∼186 °C (or 125 °C/W junction-to-air thermal resistance). In both cases, the top Au metal layer has a limited impact on lateral heat spreading. Under extreme powering conditions, the 5×5 mm PQFN package reaches a peak temperature of ∼126 °C (66 °C/W thermal resistance). A ∼32% reduction in peak temperature is achieved with the 5×5 PQFN package. The improvement is mainly due to the larger package size, high conductivity die attach material, thicker leadframe, and additional board thermal vias. A parametric study shows that the increase in leadframe thickness from 0.2 mm (8 mils) to 0.5 mm (20 mils) in the QFN package will lead to only 3% reduction in peak temperature. By comparison, for both packages, the die attach material (conductive epoxy versus solder) will have a significant impact on the overall reduction in peak temperature (∼12%). Experimental measurements using an infrared microscope are performed to validate the numerical results. The results indicate good agreement (∼6% discrepancy) between the numerical model and the measurement.

Thermal Performance Optimization of RF Packages for Wireless Communication

2003 ◽  
Author(s):  
Victor Adrian Chiriac ◽  
Tien-Yu Tom Lee ◽  
Vern Hause
Keyword(s):  
Wireless Communication ◽  
Thermal Resistance ◽  
Thermal Performance ◽  
Performance Optimization ◽  
Numerical Study ◽  
Metal Layer ◽  
Peak Temperature ◽  
Junction Temperature ◽  
Board Structure ◽  
Die Attach

The increasing trend in power levels and associated densities leads to the need of design thermal optimization, either at the module level or at the system (module-board stack-up) level. The wireless communication industry is facing multiple challenges as it tries to promote smaller, faster and cost-effective packages, yet trying to cope with potential thermal bottlenecks. The present study investigates a new family of packages, whose thermal and electrical performances are far superior to the classic (standard) packages. A 3-D conjugate numerical study was conducted to evaluate the thermal performance of Gallium Arsenic (GaAs) die packaged in Quad Flat No Lead (QFN) packages for various wireless and networking applications. Two different QFN packages are investigated: a standard package and a Power package (PQFN) with thicker leadframe and solder die attach. The thermal impact of die attach material, leadframe thickness, die pad size, and board structure is evaluated and provides valuable information for product designers. Two powering scenarios are investigated: 1) one for standard operating parameters and 2) an alternative for extreme operating powering scenarios. Results indicate that the peak temperature reached on the die for 3×3 mm QFN under normal powering conditions is ∼138.5°C (or 119°C/W junction-to-air thermal resistance), while for the extreme scenario, the junction temperature is ∼186°C (or 125°C/W junction-to-air thermal resistance). In both cases, the top Au metal layer has a limited impact on lateral heat spreading. Under extreme powering conditions, the 5×5 mm PQFN package reaches a peak temperature of ∼126°C (66°C/W thermal resistance). A ∼32% reduction in peak temperature is achieved with the 5×5 PQFN package. The improvement is mainly due to the larger package size, high conductivity die attach material, thicker leadframe and more board thermal vias. A parametric study shows that the increase in leadframe thickness from 0.2 mm (8 mils) to 0.5 mm (20 mils) in the QFN package will lead to only 3% reduction in peak temperature. By comparison, for both packages, the die attach material (conductive epoxy vs. solder) will have a significant impact on the overall reduction in peak temperature (∼12%). Experimental measurements using an Infrared (IR) Microscope are performed to validate the numerical results. The results indicate good agreement (∼6% discrepancy) between the numerical model and the measurement.

System and Package Level Thermal Optimization of Power Amplifier Modules With Application in Wireless Communication

2003 ◽  
Author(s):  
Victor Adrian Chiriac ◽  
Tien-Yu Tom Lee ◽  
David Lutz
Keyword(s):  
Power Amplifier ◽  
Thermal Performance ◽  
Performance Optimization ◽  
Peak Temperature ◽  
System Level ◽  
Specific Test ◽  
Baseline Design ◽  
Thermal Optimization ◽  
Solid Ground ◽  
Test Conditions

Increased functionality of microelectronic packages for commercial applications leads to the necessity of identifying packaging solutions with high standards for thermal performance, during its functioning lifetime as well as during various test conditions. A detailed numerical analysis examines the thermal characteristics of a power amplifier module for time division multiple access (TDMA), using commercially available software. The increasing trend in power levels and densities leads to the need of design thermal optimization, either at module level or system level. Under specific test conditions, the thermal performance of the module degrades gradually; therefore, alternative test designs are investigated for thermal performance optimization. Initial study focuses on assessing the thermal performance of a baseline design. The peak temperature reaches 144°C, about 60°C temperature increase over the reference temperature. The peak temperature value is below the limit of 150°C. Further investigation focuses on several systems level designs, by incorporating individual test contactors between the DUT and load board or with conductive elastomers or pedestal solid ground slug for thermal performance enhancement. The peak temperatures are calculated in this case for the system being exposed to the ambient at 85°C. The results indicate that the test design with solid ground slug provides the best thermal performance, ∼ 5% better than the other designs. The small difference between the first two designs (with individual contactors and separate solid ground slug with conductive elastomer) resides in the fact that the elastomer has a small thickness (0.25mm), thus a low thermal resistance (based on thermal conductivity greater than 1W/mK), with minimal impact on the overall thermal performance of the TDMA under current test conditions. The temperature difference between the top section of the contactor designs with the CBC pin/copper block/pedestal is small; in spite of this, the high temperature reached by the individual CBC pins induces possible failures in the elastomer. The designs with pedestal and solid ground slugs have a notable advantage over the design with individual contactors, due to no moving parts within the elastomer, being more robust. The peak temperature reached by the module under the best/worst testing scenarios varies by ∼ 4–5%.

Sign in / Sign up

Export Citation Format

Share Document