Steady-State and Transient Thermal Performance Optimization of Power Automotive Modules

2009 ◽  
Author(s):  
Victor Chiriac
Keyword(s):  
Steady State ◽  
Thermal Performance ◽  
Numerical Study ◽  
Peak Temperature ◽  
System Level ◽  
Main Concern ◽  
Thermal Impact ◽  
Automotive Applications ◽  
Isothermal Boundary ◽  
Transient Thermal

An extensive 3-D conjugate numerical study is conducted to assess the thermal performance of power packages for automotive applications. The automotive industry deals on a daily basis with various package and module-level thermal issues when managing the routing of very high current. The study provides a better understanding of the strengths and weaknesses of IC incorporation into a system module, for present and future product development. Several packages are investigated, ranging from smaller die/flag size to larger ones, single or multiple heat sources, operating under various powering and boundary conditions. The steady state and transient thermal impact of the thicker lead frame and die attach material on the overall thermal behavior is evaluated. The main concern is exceeding the thermal budget at an external ambient temperature of 85°C, specific for the relatively extreme automotive operating environments. Under one steady state (1W) operating scenario, the PQFN package reaches a peak temperature of ∼106.3°C, while under 37W@40ms of transient powering, the peak temperature reached by the corner FET is ∼260.8°C. With an isothermal boundary (85°C) attached to the board backside, the junction temperature does not change, as the PCB has no significant thermal impact. When the isothermal boundary is attached to package bottom, peak temperature drops by 20% after 40 ms. Additional system level with multiple optimized packages placed on a custom PCB is evaluated numerically and experimentally, placing an emphasis on the superior thermal performance of this new class of power packages for automotive applications. The optimized numerical model approximates closely the empirical results (121–126°C vs. 127.5°C), within 1–2%.

Thermal Performance Evaluation of New Power QFN (Quad Flat No Lead) Packages for Automotive Applications

2004 ◽  
Author(s):  
Victor Chiriac ◽  
Tien-Yu Tom Lee
Keyword(s):  
Steady State ◽  
Thermal Performance ◽  
Numerical Study ◽  
Peak Temperature ◽  
Junction Temperature ◽  
Automotive Applications ◽  
Isothermal Boundary ◽  
Die Attach ◽  
Transient Thermal ◽  
The Impact

An extensive 3-D conjugate numerical study is conducted to assess the thermal performance of the novel Power Quad Flat No Lead (PQFN) packages for automotive applications. Several PQFN packages are investigated, ranging from smaller die/flag size to larger ones, single or multiple heat sources, operating under various powering and boundary conditions. The steady state and transient thermal performance are compared to those of the classical packages, and the impact of the thicker lead frame and die attach material on the overall thermal behavior is also evaluated. Under one steady state (1W) operating scenario, the PQFN package reaches a peak temperature of ~106.3°C, while under 37W@40ms of transient powering, the peak temperature reached by the corner FET is ~260.8°C. With an isothermal boundary (85°C) attached to the board backside, the junction temperature does not change, as the PCB has no significant thermal impact. However, when the isothermal boundary is attached to package bottom, it leads to a drop in by almost 20% after 40 ms. Additional transient cases are evaluated, with an emphasis on the superior thermal performance of this new class of power packages for automotive applications.

System-Level Transient Thermal Analysis for Performance Optimization of High Power Microelectronics

2003 ◽  
Author(s):  
Victor Adrian Chiriac ◽  
Tien-Yu Tom Lee ◽  
H. S. Chen
Keyword(s):  
Thermal Performance ◽  
Performance Optimization ◽  
Numerical Study ◽  
Optimal Operation ◽  
System Level ◽  
Main Concern ◽  
Efficient Operation ◽  
Normal Test ◽  
Transient Thermal ◽  
Short Time

The increasing trend in power levels and densities leads to the need of design thermal optimization, at either module or system level. A numerical study using finite-volume software was conducted to model the transient thermal behavior of a system including a package dissipating large amounts of power over short time durations. The system is evaluated by choosing the appropriate heat sink for the efficient operation of the device under 100W of constant powering, also to enhance the thermal performance of the enclosure/box containing the test stack-up. The intent of the study is to provide a meaningful understanding and prediction of the high transient powering scenarios. The study focuses on several powering and system design scenarios, identifying the main issues encountered during a normal device operation. The power source dissipates 100W for 2 seconds then is cooled for another 2 seconds. This thermal cycle is likely to occur several times during a normal test-up, and it is the main concern of the manufacturers not to exceed a limit temperature during the device testing operation. The transient trend is further extrapolated analytically to extract the steady state peak temperature values, in order to maintain the device peak temperatures below 120°C. The benefit of the study is related to the possibility to extract the maximum/minimum temperatures for a real test involving a large number of heating-cooling cycles, yet maintaining the initial and peak temperatures within a certain range, for the optimal operation of the device. The flow and heat transfer fields are thoroughly investigated. By using a combination of numerical and analytical study, the thermal performance of the device undergoing infinity of periodic thermal cycles is further predicted.

System Level Thermal Performance Evaluation of New Inverted Exposed Pad Packages for Automotive Applications

2006 ◽  
Author(s):  
Victor Adrian Chiriac ◽  
Tien-Yu Tom Lee
Keyword(s):  
Thermal Resistance ◽  
Thermal Performance ◽  
Peak Temperature ◽  
System Level ◽  
Total Power ◽  
Automotive Applications ◽  
Typical Application ◽  
Cu Alloy ◽  
Die Attach ◽  
The Impact

An extensive 3-D conjugate numerical study is conducted to assess the thermal performance of the novel 54 lead SOIC (with inverted exposed Cu pad) packages for automotive applications. The thermal performance of the modified designs with exposed pad are investigated, ranging from smaller die/flag size to larger ones, with single or multiple heat sources operating under various powering conditions. The thermal performance is compared to other existing packages with typical application to the automotive industry. The impact of the lead frame geometrical structure and die attach material on the overall thermal behavior is evaluated. Under one steady state (4W) operating scenario, the package reaches a peak temperature of 117.1°C, corresponding to a junction-to-heatsink thermal resistance Rjhs of 4.27°C/W. For the design with a slightly smaller Cu alloy exposed pad (Cu Alloy), the peak temperature reached by the FETs is 117.8°C, slightly higher than for the design with the intermediate size flag. In this case, the junction-to-heatsink thermal resistance Rj-hs is 4.45°C/W. The worst case powering scenario is identified, with 1.312W/FET and total power of 10.5W, barely satisfying the overall thermal budget. The variation of the peak (junction) temperature is also evaluated for several powering scenarios. Finally, a comparison with a different exposed pad package is made. The impact of the higher thermal conductivity (solder) die attach is evaluated and compared to the epoxy die attach in the 54 lead SOIC package. Several cases are evaluated in the paper, with an emphasis on the superior thermal performance of new packages for automotive applications.

System Level Transient Thermal Performance of High-Power Dynamic Microelectronics

2009 ◽  
Author(s):  
Victor Chiriac
Keyword(s):  
Steady State ◽  
High Power ◽  
Superposition Principle ◽  
Peak Temperature ◽  
System Level ◽  
Final Temperature ◽  
Thermal Budget ◽  
Power Dynamic ◽  
Current Limit ◽  
Transient Thermal

System-level thermal transient analysis of High-Power Dynamic Microelectronics System is performed using numerical simulations. The SmartMOS-type device is packaged in 20 lead SOIC module with exposed copper slug. The package is attached to 4-layer PCB with embedded thermal vias. The challenge resides in the transient thermal interaction between the dynamic heat sources (high/low side motors), activated simultaneously at different powering profiles. Several operating steps are simulated, and the transient thermal behavior for each source is analyzed then optimized during the process. The low side motor reaches a peak temperature of ∼126.1°C at 2.25s, while the final temperature reached by the motor after one cycle (2.565 s) is ∼75.9°C. The DC current limit study indicates that the current over 1A exceeds the thermal budget. The case with 0.5A current limit reaches 135°C after 4 cycles, satisfying the thermal budget. Additional studies for an equivalent system were performed with only the high side driver actively dissipating 120W for 2.56 ms. The peak temperature reached by the system during the first cycle (2.56 us) is ∼65°C. Analytical study was performed to evaluate the steady state (final) temperature after a large number of dynamic powering cycles, based on heating/cooling behavior and superposition principle. The peak temperature reached by the IC will not exceed 92°C (using the steady state value and the temperature fluctuations per transient cycle). A correlation to predict the peak temperatures reached by the dynamic system after a long number of powering cycles is provided.

An Investigation of the Effect of interrupted fin arrangements on the Thermal Performance of a Heat Sink under a Free Convection Condition

2019 ◽  
Vol 7 (1) ◽  
pp. 43-53
Author(s):  
Abbas Jassem Jubear ◽  
Ali Hameed Abd
Keyword(s):  
Heat Transfer ◽  
Steady State ◽  
Natural Convection ◽  
Thermal Performance ◽  
Heat Sink ◽  
Numerical Study ◽  
Ansys Fluent ◽  
Fluent Software ◽  
Steady State Heat ◽  
Steady State Heat Transfer

The heat sink with vertically rectangular interrupted fins was investigated numerically in a natural convection field, with steady-state heat transfer. A numerical study has been conducted using ANSYS Fluent software (R16.1) in order to develop a 3-D numerical model.  The dimensions of the fins are (305 mm length, 100 mm width, 17 mm height, and 9.5 mm space between fins. The number of fins used on the surface is eight. In this study, the heat input was used as follows: 20, 40, 60, 80, 100, and 120 watts. This study focused on interrupted rectangular fins with a different arrangement and angle of the fins. Results show that the addition of interruption in fins in various arrangements will improve the thermal performance of the heat sink, and through the results, a better interruption rate as an equation can be obtained.

Thermal Assessment of Cooling System Incorporating Heat Sink and Embedded Heat Pipes for Testing High Power Microelectronics

2005 ◽  
Author(s):  
Victor Adrian Chiriac ◽  
Tien-Yu Tom Lee
Keyword(s):  
Steady State ◽  
Heat Pipe ◽  
Thermal Performance ◽  
Heat Sink ◽  
Heat Pipes ◽  
Optimal Operation ◽  
Operating Conditions ◽  
Peak Temperature ◽  
Testing System ◽  
The Impact

A numerical study was conducted to model the transient thermal behavior of a complex testing system including multiple fans, a mixing enclosure, copper inserts and a leaded package dissipating large amounts of power over short time durations. The system is optimized by choosing appropriate heat sink/fan structure for the efficient operation of the device under constant powering. The intent of the study is to provide a better understanding and prediction of a transient powering scenario at high powering levels, while evaluating the impact of alternative cooling fan/heat pipe designs on the thermal performance of the testing system. One design is chosen due to its effective thermal performance and assembly simplicity, with the package embedded in heat sink base with multiple (5) heat pipes. The peak temperature reached by the modified design with 4 cooling fans is ~95°C, with the corresponding Rja thermal resistance ~0.58°C/W. For the transient study (with embedded heat pipes and 4 fans), after one cycle, both peak temperature (at 45 s) and the end temperature (at 49 s) decrease as compared to the previous no heat pipe/single fan case (the end temperature reduces by ~16%). The temperature drop between peak and end for each cycle is ~80.2°C, while the average power per transient cycle is ~31.27W. With this power, the design with 5 perpendicular heat pipes, 4 fans and insert reaches a steady state peak temperature of ~98°C. Applying the superposition principle to the steady state value and 40.1°C fluctuation, the maximum transient temperature after a large number of cycles will not exceed ~138.1°C, satisfying the thermal budget under the current operating conditions. The benefit of the study is related to the possibility to extract the maximum and minimum temperatures for a real test involving a large number of heating-cooling cycles, yet maintaining the initial and peak temperatures within a certain range for the optimal operation of the device. The flow and heat transfer fields are investigated; using a combination of numerical and analytical methods, the thermal performance of the device undergoing large number of periodic thermal cycles is predicted. The comparison between measurement and simulation shows good agreement.

System Level Thermal Optimization of an Automotive Lightning Module Incorporating Several Power Devices

2007 ◽  
Author(s):  
Victor Chiriac ◽  
Tien-Yu Tom Lee
Keyword(s):  
Thermal Performance ◽  
Power Dissipation ◽  
Heat Dissipation ◽  
System Level ◽  
Total Power ◽  
Main Concern ◽  
Optimized Design ◽  
Passive Components ◽  
Thermal Budget ◽  
The Impact

The conjugate thermal performance of microelectronics module incorporating several power packages and additional passive components in a custom environment is evaluated and further optimized using numerical simulation and experimental validation. The automotive industry deals on a daily basis with multiple packaging and module-level thermal issues when reducing the size of components for a lightning system in a car, while managing the routing of very high current. The study provides a better understanding of the strengths and weaknesses of the IC incorporation into a system module level, for both present and future product development. The reference design is evaluated at a system level, and several improvements are identified to enhance the overall thermal performance of the lightning system. The main concern is related to the possibility of exceeding the thermal budget for a large system incorporating several PQFN (Power Quad Flat No-Lead Package) packages with additional heat dissipation devices in an enclosure, at an external ambient temperature of 85°C. Due to the compactness of the device, there are only limited solutions to extract the heat from the high power dissipation system. The impact on the thermal balance of the trace dissipation, the location and size of the pins connecting the two boards (motherboard and daughter board) forming the system, the header heating and other passive components under various powered conditions are evaluated. A revised model includes additional pins (reduced diameter), modified motherboard and harness structures and their locations; the impact of additional heater traces on both top and bottom surfaces of the motherboard, and a modified daughter board design, is also evaluated. The resulting peak temperatures range from 118.3°C to 137.3°C and the corresponding junction-to-ambient thermal resistances (Rja) vary from 8.4°C/W to 8.8°C/W. Rja is defined as the temperature difference between the peak device and ambient divided by the total power dissipation of the PQFN packages. An optimized design is further evaluated, with lowered thermal resistance from the motherboard, the board-to-board pins, the junction box board, and the wiring harness. The thermal budget is satisfied, as the peak temperatures reached by the two designs are below the 150°C limit. Additional experimental results are used to benchmark the simulation results, within 1–6% accuracy.

Steady-State and Transient Thermal Performance of Subsea Hardware

1998 ◽  
Vol 13 (02) ◽  
pp. 108-113 ◽  
Author(s):  
G.J. Zabaras ◽  
Jianfeng Zhang
Keyword(s):  
Steady State ◽  
Thermal Performance ◽  
Transient Thermal

Thermal Performance Optimization of Radio Frequency Packages for Wireless Communication

2004 ◽  
Vol 126 (4) ◽  
pp. 429-434 ◽  
Author(s):  
Victor Adrian Chiriac ◽  
Tien-Yu Tom Lee ◽  
Vern Hause
Keyword(s):  
Wireless Communication ◽  
Thermal Resistance ◽  
Thermal Performance ◽  
Performance Optimization ◽  
Numerical Study ◽  
Metal Layer ◽  
Peak Temperature ◽  
Junction Temperature ◽  
Board Structure ◽  
Die Attach

The increasing trend in power levels and associated densities leads to the need of design thermal optimization, either at the module level or at the system (module-board stack-up) level. The wireless communication industry is facing multiple challenges as it tries to promote smaller, faster and cost-effective packages, yet trying to cope with potential thermal bottlenecks. The present study investigates a family of packages, whose thermal and electrical performances are far superior to the classic (standard) packages. A three-dimensional conjugate numerical study was conducted to evaluate the thermal performance of gallium arsenic die packaged in quad flat no-lead (QFN) packages for various wireless and networking applications. Two different QFN packages are investigated: a standard package and a power package (PQFN) with thicker leadframe and solder die attach. The thermal impact of die attach material, leadframe thickness, die pad size, and board structure is evaluated and provides valuable information for product designers. Two powering scenarios are investigated: (1) one for standard operating parameters and (2) an alternative for extreme operating powering scenarios. Results indicate that the peak temperature reached on the die for 3×3 mm QFN under normal powering conditions is ∼138.5 °C (or 119 °C/W junction-to-air thermal resistance), while for the extreme scenario, the junction temperature is ∼186 °C (or 125 °C/W junction-to-air thermal resistance). In both cases, the top Au metal layer has a limited impact on lateral heat spreading. Under extreme powering conditions, the 5×5 mm PQFN package reaches a peak temperature of ∼126 °C (66 °C/W thermal resistance). A ∼32% reduction in peak temperature is achieved with the 5×5 PQFN package. The improvement is mainly due to the larger package size, high conductivity die attach material, thicker leadframe, and additional board thermal vias. A parametric study shows that the increase in leadframe thickness from 0.2 mm (8 mils) to 0.5 mm (20 mils) in the QFN package will lead to only 3% reduction in peak temperature. By comparison, for both packages, the die attach material (conductive epoxy versus solder) will have a significant impact on the overall reduction in peak temperature (∼12%). Experimental measurements using an infrared microscope are performed to validate the numerical results. The results indicate good agreement (∼6% discrepancy) between the numerical model and the measurement.

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