Electrical Characterization of NCP- and NCF-Bonded Fine-Pitch Flip-Chip-on-Flexible Packages

2007 ◽  
Vol 30 (1) ◽  
pp. 142-147 ◽  
Author(s):  
Y. C. Chan ◽  
S. C. Tan ◽  
Nelson S. M. Lui ◽  
C. W. Tan
Keyword(s):  
Flip Chip ◽  
Electrical Characterization ◽  
Fine Pitch

Electrical Characterization of NCP- and NCF-Bonded Fine-Pitch Flip-Chip-on-Flexible Packages

2006 ◽  
Vol 29 (4) ◽  
pp. 735-740 ◽  
Author(s):  
Y. C. Chan ◽  
S. C. Tan ◽  
Nelson S. M. Lui ◽  
C. W. Tan
Keyword(s):  
Flip Chip ◽  
Electrical Characterization ◽  
Fine Pitch

Electrical characterization of fine-pitch compliant bumps

2009 ◽  
Author(s):  
C. K. Lin ◽  
Chih Chen ◽  
Shyh-Ming Chang ◽  
Chao-Chyun An ◽  
Hsiao Ting Lee ◽  
...  
Keyword(s):  
Electrical Characterization ◽  
Fine Pitch

Electrical characterization of fine-pitch compliant bumps

2008 ◽  
Author(s):  
C. K. Lin ◽  
Chih Chen ◽  
Shyh-Ming Chang ◽  
Chao-Chyun An ◽  
Hsiao Ting Lee ◽  
...  
Keyword(s):  
Electrical Characterization ◽  
Fine Pitch

Electrical Characterization of High Performance Fine Pitch Interconnects in Silicon-Interconnect Fabric

2018 ◽  
Author(s):  
SivaChandra Jangam ◽  
Adeel Ahmed Bajwa ◽  
Kannan K Thankkappan ◽  
Premsagar Kittur ◽  
Subramanian Srikantes Iyer
Keyword(s):  
High Performance ◽  
Electrical Characterization ◽  
Fine Pitch

Electrical Characterization of FCBGA Package Based on Measurement Approach for High-speed SOC Applications

2006 ◽  
Vol 3 (4) ◽  
pp. 216-225
Author(s):  
Ming-Kun Chen ◽  
Cheng-Chi Tai ◽  
Yu-Jung Huang
Keyword(s):  
Transmission Lines ◽  
High Speed ◽  
Flip Chip ◽  
Equivalent Circuit Model ◽  
Electrical Characterization ◽  
Time Domain Reflectometry ◽  
Electronic Market ◽  
Wide Range ◽  
The Time Domain

With high-speed computers and wireless communications system become more popular in the electronic market, these communication-oriented products require high packaging densities, clock rates and higher switching speeds over Gb/s. A multilayer flip-chip Ball grid array (FCBGA) package used for applications running at more than 1 Gb/s has been characterized in this work. Electrical characterization of the package becomes essential beyond 1 GHz considering that the interconnections on the package behave not only just as interconnections but also as transmission lines. In this paper, we present the measurement and simulation results for interconnection of an FCBGA package using the time domain reflectometry (TDR) method. Simulation and measurement results are compared to establish a proper equivalent circuit model of the FCBGA interconnections. The parasitics of the power network can be measured through TDR, vector network analyzer (VNA) and impedance analyzer (IA). The complete models generated in this work are targeted for high-speed system-on-chip (SOC) devices that have a wide range of uses across commercial electronic applications.

Experimental Characterization of Monotonic and Fatigue Delamination of Novel Underfill Materials

2006 ◽  
Vol 128 (4) ◽  
pp. 405-411 ◽  
Author(s):  
Saketh Mahalingam ◽  
Kunal Goray ◽  
Sandeep Tonapi ◽  
Suresh K. Sitaraman
Keyword(s):  
Flip Chip ◽  
Fatigue Loading ◽  
Experimental Characterization ◽  
Material Interfaces ◽  
Interfacial Delamination ◽  
Mechanical Fatigue ◽  
Fine Pitch ◽  
Processing Steps ◽  
Delamination Propagation

No-flow underfill materials reduce assembly processing steps and can potentially be used in fine-pitch flip chip on organic board assemblies. Such no-flow underfills, when filled with nano-scale fillers, can significantly enhance the solder bump reliability, if the underfills do not prematurely delaminate or crack. Therefore, it is necessary to understand the risk of underfill delamination during assembly and during further thermal excursions. In this paper, the interface between silicon nitride (SiN) passivation and a nano-filled underfill (NFU) material is characterized under monotonic as well as thermo-mechanical fatigue loading, and fracture parameters have been obtained from such experimental characterization. The passivation-underfill interfacial delamination propagation under monotonic loading has been studied through a fixtureless residual stress induced decohesion (RSID) test. The propagation of interfacial delamination under thermo-mechanical fatigue loading has been studied using sandwiched assemblies and a model for delamination propagation has been developed. The characterization results obtained from this work can be used to assess the delamination propagation in flip-chip assemblies. Though the methods presented in this paper have been applied to nano-filled, no-flow underfill materials, their application is not limited to such materials or material interfaces.

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