Investigation of Gate Etch Damage at Metal/High-$k$ Gate Dielectric Stack Through Random Telegraph Noise in Gate Edge Direct Tunneling Current

2011 ◽  
Vol 32 (4) ◽  
pp. 569-571 ◽  
Author(s):  
Heung-Jae Cho ◽  
Younghwan Son ◽  
Byoungchan Oh ◽  
Seunghyun Jang ◽  
Jong-Ho Lee ◽  
...  
2011 ◽  
Author(s):  
Muhammad F. Sahdan ◽  
Panji Achmari ◽  
Fatimah A. Noor ◽  
Ferry Iskandar ◽  
Mikrajuddin Abdullah ◽  
...  

2011 ◽  
Vol 110-116 ◽  
pp. 5442-5446
Author(s):  
Li Jun Xu ◽  
He Ming Zhang ◽  
Hui Yong Hu ◽  
Xiao Bo Xu ◽  
Jian Li Ma

As the size of MOS device scaled down to sub 100nm, the direct tunneling current of gate oxide increases more and more. Using silicon nitride as gate dielectric can solve this problem effectively in some time due to the dielectric constant of silicon nitride is larger than silica’s.This paper derived the dielectric constant of silicon nitride stack gate dielectric,and simulated the direct tunneling current of strained MOS device with silica and silicon nitride gate dielectric through device simulation software ISE TCAD10.0,studied the direct tunneling current of strained MOS device with silicon nitride stack gate dielectric change with the variation of some parameters and the application limit of silicon nitride material.


2000 ◽  
Vol 47 (10) ◽  
pp. 1851-1857 ◽  
Author(s):  
S. Mudanai ◽  
Yang-Yu Fan ◽  
Qiqing Ouyang ◽  
A.F. Tasch ◽  
S.K. Banerjee

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