Modeling of direct tunneling current through gate dielectric stacks

2000 ◽  
Vol 47 (10) ◽  
pp. 1851-1857 ◽  
Author(s):  
S. Mudanai ◽  
Yang-Yu Fan ◽  
Qiqing Ouyang ◽  
A.F. Tasch ◽  
S.K. Banerjee
Keyword(s):  
Gate Dielectric ◽  
Tunneling Current ◽  
Direct Tunneling ◽  
Direct Tunneling Current

The Study of Direct Tunneling Current in Strained MOS Device with Silicon Nitride Stack Gate Dielectric

2011 ◽  
Vol 110-116 ◽  
pp. 5442-5446
Author(s):  
Li Jun Xu ◽  
He Ming Zhang ◽  
Hui Yong Hu ◽  
Xiao Bo Xu ◽  
Jian Li Ma
Keyword(s):  
Dielectric Constant ◽  
Silicon Nitride ◽  
Gate Dielectric ◽  
Device Simulation ◽  
Tunneling Current ◽  
Simulation Software ◽  
Direct Tunneling ◽  
Direct Tunneling Current ◽  
Application Limit ◽  
Mos Device

As the size of MOS device scaled down to sub 100nm, the direct tunneling current of gate oxide increases more and more. Using silicon nitride as gate dielectric can solve this problem effectively in some time due to the dielectric constant of silicon nitride is larger than silica’s.This paper derived the dielectric constant of silicon nitride stack gate dielectric,and simulated the direct tunneling current of strained MOS device with silica and silicon nitride gate dielectric through device simulation software ISE TCAD10.0,studied the direct tunneling current of strained MOS device with silicon nitride stack gate dielectric change with the variation of some parameters and the application limit of silicon nitride material.

Improvement in Gate Dielectric Quality of Ultra Thin a: SiN:H MNS Capacitor by Hydrogen Etching of the Substrate

2002 ◽  
Vol 716 ◽  
Author(s):  
Parag C. Waghmare ◽  
Samadhan B. Patil ◽  
Rajiv O. Dusane ◽  
V.Ramgopal Rao
Keyword(s):  
Silicon Nitride ◽  
Gate Dielectric ◽  
Substrate Surface ◽  
Scaling Limit ◽  
Tunneling Current ◽  
Chemical Vapor ◽  
Poor Performance ◽  
State Density ◽  
Direct Tunneling Current

AbstractTo extend the scaling limit of thermal SiO2, in the ultra thin regime when the direct tunneling current becomes significant, members of our group embarked on a program to explore the potential of silicon nitride as an alternative gate dielectric. Silicon nitride can be deposited using several CVD methods and its properties significantly depend on the method of deposition. Although these CVD methods can give good physical properties, the electrical properties of devices made with CVD silicon nitride show very poor performance related to very poor interface, poor stability, presence of large quantity of bulk traps and high gate leakage current. We have employed the rather newly developed Hot Wire Chemical Vapor Deposition (HWCVD) technique to develop the a:SiN:H material. From the results of large number of optimization experiments we propose the atomic hydrogen of the substrate surface prior to deposition to improve the quality of gate dielectric. Our preliminary results of these efforts show a five times improvement in the fixed charges and interface state density.

Analysis of PD SOI pMOSFET Device Performance Enhancement due to Direct-Tunneling Current in the Partial n+ Poly Gate

2019 ◽  
Vol 6 (4) ◽  
pp. 165-170 ◽  
Author(s):  
Georges Guegan ◽  
Jeremy Pretet ◽  
Romain Gwoziecki ◽  
Olivier Gonnard ◽  
Gilles Gouget ◽  
...  
Keyword(s):  
Performance Enhancement ◽  
Tunneling Current ◽  
Device Performance ◽  
Direct Tunneling ◽  
Direct Tunneling Current
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