A Simulator of Small-Delay Faults Caused by Resistive-Open Defects

2008 ◽  
Author(s):  
Alejandro Czutro ◽  
Nicolas Houarche ◽  
Piet Engelke ◽  
Ilia Polian ◽  
Mariane Comte ◽  
...  
Keyword(s):  
Delay Faults ◽  
Small Delay ◽  
Open Defects ◽  
Resistive Open Defects

Small Delay Fault Model for Intra-Gate Resistive Open Defects

2009 ◽  
Author(s):  
Masayuki Arai ◽  
Akifumi Suto ◽  
Kazuhiko Iwasaki ◽  
Katsuyuki Nakano ◽  
Michihiro Shintani ◽  
...  
Keyword(s):  
Fault Model ◽  
Delay Fault ◽  
Small Delay ◽  
Open Defects ◽  
Resistive Open Defects

Dynamic Two-Cell Incorrect Read Fault Due to Resistive-Open Defects in the Sense Amplifiers of SRAMs

2007 ◽  
Author(s):  
A. Ney ◽  
P. Girard ◽  
C. Landrault ◽  
S. Pravossoudovitch ◽  
A. Virazel ◽  
...  
Keyword(s):  
Open Defects ◽  
Sense Amplifiers ◽  
Resistive Open Defects

Impact of Resistive-Open Defects on SRAM Error Rate Induced by Alpha Particles and Neutrons

2011 ◽  
Vol 58 (3) ◽  
pp. 855-861 ◽  
Author(s):  
P Rech ◽  
J-M Galliere ◽  
P Girard ◽  
F Wrobel ◽  
F Saigne ◽  
...  
Keyword(s):  
Error Rate ◽  
Alpha Particles ◽  
Open Defects ◽  
Resistive Open Defects

Analysis of Resistive-Open Defects in SRAM Sense Amplifiers

2009 ◽  
Vol 17 (10) ◽  
pp. 1556-1559 ◽  
Author(s):  
A. Ney ◽  
P. Girard ◽  
S. Pravossoudovitch ◽  
A. Virazel ◽  
M. Bastian
Keyword(s):  
Open Defects ◽  
Sense Amplifiers ◽  
Resistive Open Defects

Divide and Compact — Stochastic Space Compaction for Faster-than-at-Speed Test

2019 ◽  
Vol 28 (supp01) ◽  
pp. 1940001
Author(s):  
Alexander Sprenger ◽  
Sybille Hellebrand
Keyword(s):  
State Of The Art ◽  
Set Partitioning ◽  
Delay Faults ◽  
Clock Frequency ◽  
Speed Test ◽  
Proper Mapping ◽  
Small Delay ◽  
Stochastic Space ◽  
Partitioning Problem ◽  
Scan Chain

With shrinking feature sizes detecting small delay faults is getting more and more important. But not all small delay faults are detectable during at-speed test. By overclocking the circuit with several different test frequencies faster-than-at-speed test (FAST) is able to detect these hidden delay faults. If the clock frequency is increased, some outputs of the circuit may not have stabilized yet, and these outputs have to be considered as unknown ([Formula: see text]-values). These [Formula: see text]-values impede the test response compaction. In addition, the number and distribution of the [Formula: see text]-values vary with the clock frequency, and thus a very flexible [Formula: see text]-handling is needed for FAST. Most of the state-of-the-art solutions are not designed for these varying [Formula: see text]-profiles. Yet, the stochastic compactor by Mitra et al. can be adjusted to changing environments. It is easily programmable because it is controlled by weighted pseudo-random signals. But an optimal setup cannot be guaranteed in a FAST scenario. By partitioning the compactor into several smaller ones and a proper mapping of the scan outputs to the compactor inputs, the compactor can be better adapted to the varying [Formula: see text]-profiles. Finding the best setup can be formulated as a set partitioning problem. To solve this problem, several algorithms are presented. Experimental results show that independent from the scan chain configuration, the number of [Formula: see text]-values can be reduced significantly while the fault efficiency can be maintained. Additionally, it is shown that [Formula: see text]-reduction and fault efficiency can be adapted to user-defined goals.

Resistive-Open Defects in Write Drivers

2009 ◽  
pp. 81-97
Author(s):  
Patrick Girard ◽  
Alberto Bosio ◽  
Luigi Dilillo ◽  
Serge Pravossoudovitch ◽  
Arnaud Virazel
Keyword(s):  
Open Defects ◽  
Resistive Open Defects
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