Integration of a double-polysilicon emitter-base self-aligned bipolar transistor into a 0.5- mu m BiCMOS technology for fast 4-Mb SRAM's
1993 ◽
Vol 40
(6)
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pp. 1121-1128
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1992 ◽
Vol 39
(8)
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pp. 1865-1869
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1986 ◽
Vol 7
(12)
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pp. 658-660
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1986 ◽
Vol 33
(11)
◽
pp. 1853-1854
2004 ◽
Vol 48
(12)
◽
pp. 2243-2249
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