Relationship between trapped holes and interface states in MOS capacitors

1980 ◽  
Vol 36 (7) ◽  
pp. 590-592 ◽  
Author(s):  
Genda Hu ◽  
Walter C. Johnson
Keyword(s):  
Interface States ◽  
Mos Capacitors

Long‐term charge storage in interface states of ZnS MOS capacitors

1975 ◽  
Vol 46 (7) ◽  
pp. 2992-2997 ◽  
Author(s):  
L. G. Walker ◽  
G. W. Pratt Jr.
Keyword(s):  
Interface States ◽  
Charge Storage ◽  
Mos Capacitors

Fabrication of 4H-SiC p-Channel MOSFET with High Channel Mobility

2006 ◽  
Vol 527-529 ◽  
pp. 1301-1304
Author(s):  
Mitsuo Okamoto ◽  
Mieko Tanaka ◽  
Tsutomu Yatsuo ◽  
Kenji Fukuda
Keyword(s):  
Valence Band ◽  
Oxidation Process ◽  
Gate Oxide ◽  
Interface States ◽  
Wet Oxidation ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
Dry Oxidation ◽  
Low Threshold ◽  
P Type

We have fabricated inversion-type p-channel MOSFETs on 4H-SiC substrates. In this paper, influences of gate oxidation process on the properties of p-channel MOSFETs were investigated. The gate oxide was formed under these three conditions: (i) dry oxidation, (ii) dry oxidation following wet re-oxidation, and (iii) wet oxidation. The C-V measurements of p-type 4H-SiC MOS capacitors revealed that wet oxidation process reduced the interface states near the valence band. The p-channel MOSFET with low interface states near the valence band indicated low threshold voltage (Vth), high field effect channel mobility (μFE) and low subthreshold swing (S). We obtained 4H-SiC p-channel MOSFET with high μFE of 15.6cm2/Vs by using wet oxidation as gate oxidation process.

scholarly journals Creation of Interface States at the Silicon/Silicon Dioxide Interface by UV Light Without Hole Trapping

1989 ◽  
Vol 148 ◽  
Author(s):  
W. K. Schubert ◽  
C. H. Seager ◽  
K. L. Brower
Keyword(s):  
Silicon Dioxide ◽  
Silicon Substrate ◽  
Uv Light ◽  
Interface States ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Mos Capacitors ◽  
Hole Trapping ◽  
Creation Rate ◽  
Silicon Silicon

ABSTRACTPhotoinjection of electrons into silicon dioxide in metal-oxide-semiconductor (MOS) capacitors with 3.5 eV light is shown to create interface states with no apparent hole trapping precursor. The creation rate of these interface states depends strongly upon whether injection is from the gate metal or the silicon substrate, and on the forming gas annealing sequence used to passivate growth-induced interface states. A mechanism involving electron-induced release of hydrogen in the oxide is consistent with some aspects of the data.

Interface States in 4H- and 6H-SiC MOS Capacitors: A Comparative Study between Conductance Spectroscopy and Thermal Dielectric Relaxation Current Technique

2009 ◽  
Vol 615-617 ◽  
pp. 497-500 ◽  
Author(s):  
Lars S. Løvlie ◽  
Ioana Pintilie ◽  
S. Kumar C.P. ◽  
Ulrike Grossner ◽  
Bengt Gunnar Svensson ◽  
...  
Keyword(s):  
Comparative Study ◽  
Dielectric Relaxation ◽  
Cross Section ◽  
Capture Cross Section ◽  
Interface States ◽  
Conduction Band Edge ◽  
Capture Cross ◽  
Mos Capacitors ◽  
Dry Oxidation ◽  
Good Agreement

The purpose of this work is to compare the density of shallow interface states (Dit) at the interface of SiO2/SiC MOS capacitors as deducted by the conductance spectroscopy (CS) and thermally dielectric relaxation current (TDRC) techniques. Both capacitors of 4H- and 6H-SiC (n-type) are investigated, and both ordinary dry oxidation and an improved industrial procedure have been employed. The two techniques are found to give rather good agreement for interface states located ≥0.3 eV below the conduction band edge (Ec) while for more shallow states vastly different distributions of Dit are obtained. Different reasons for these contradictory results are discussed, such as strong temperature and energy dependence of the capture cross section of the shallow interface states.

Low Density of Interface States in n-Type 4H-SiC MOS Capacitors Achieved by Nitrogen Implantation

2005 ◽  
Vol 483-485 ◽  
pp. 693-696 ◽  
Author(s):  
Florin Ciobanu ◽  
Gerhard Pensl ◽  
Valeri V. Afanas'ev ◽  
Adolf Schöner
Keyword(s):  
Vapour Deposition ◽  
Oxidation Process ◽  
Chemical Vapour ◽  
Interface States ◽  
Conduction Band Edge ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Nitrogen Implantation ◽  
Mos Capacitors ◽  
Density Of Interface States

A surface-near Gaussian nitrogen (N) profile is implanted into n-type 4H-SiC epilayers prior to a standard oxidation process. Depending on the depth of the oxidized layer and on the implanted N concentration, the density of interface states DIT determined in corresponding 4H-SiC MOS capacitors decreases to a minimum value of approx. 1010 cm-2eV-1 in the investigated energy range (EC-(0.1 eV to 0.6 eV)), while the flat-band voltage increases to negative values due to generated fixed positive charges. A thin surface-near layer, which is highly N-doped during the chemical vapour deposition growth, leads to a reduction of DIT only close to the conduction band edge.

A Unified Two-Band Model for Oxide Traps and Interface States in MOS Capacitors

2015 ◽  
Vol 62 (3) ◽  
pp. 813-820 ◽  
Author(s):  
Yuan Taur ◽  
Han-Ping Chen ◽  
Qian Xie ◽  
Jaesoo Ahn ◽  
Paul C. McIntyre ◽  
...  
Keyword(s):  
Interface States ◽  
Band Model ◽  
Mos Capacitors ◽  
Oxide Traps ◽  
Two Band Model
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