Decoration of Al Implantation Profiles in 4H-SiC by Bevel Grinding and Dry Oxidation

The possibility to analyze micrometer scaled 2D implantation profiles is essential for improving SiC power devices. Due to the fact that the oxidation rate depends on the doping concentration a rather simple method was developed in order to decorate highly doped (aluminum) implantation profiles. For this purpose, different samples were grinded with a shallow bevel angle and subsequently oxidized. It could be shown that this method allows analyzing the implantation depth of different box-shape implanted samples. Furthermore the ability to distinguish micrometer scaled 2D profiles for a state-of-the-art SiC power device could be shown.

Electrical Characterisation of Thick 3C-SiC Layers Grown on Off-Axis 4H-SiC Substrates

300 μm thick 3C-SiC epilayer was grown on off-axis 4H-SiC(0001) substrate with a high growth rate of 1 mm/hour. Dry oxidation, wet oxidation and N2O anneal were applied to fabricate lateral MOS capacitors on these 3C-SiC layers. MOS interface obtained by N2O anneal has the lowest interface trap density of 3~4x1011 eV-1cm-2. Although all MOS capacitors still have positive net charges at the MOS interface, the wet oxidised sample has the lowest effective charge density of ~9.17x1011 cm-2.