scholarly journals Improved interface state density function in metal‐semiconductor junctions by deep‐level transient spectroscopy

1991 ◽  
Vol 69 (9) ◽  
pp. 6521-6525 ◽  
Author(s):  
N. C. Halder ◽  
H. W. Kim ◽  
K. M. D’Souza ◽  
D. E. Barnes ◽  
S. E. Hartson ◽  
...  
Keyword(s):  
Density Function ◽  
Deep Level Transient Spectroscopy ◽  
Deep Level ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Transient Spectroscopy

Deep-Level-Transient Spectroscopy Characterization of Mobility-Limiting Traps in SiO2/SiC Interfaces on C-Face 4H-SiC

2013 ◽  
Vol 740-742 ◽  
pp. 477-480 ◽  
Author(s):  
Tetsuo Hatakeyama ◽  
T. Shimizu ◽  
T. Suzuki ◽  
Y. Nakabayashi ◽  
Hajime Okumura ◽  
...  
Keyword(s):  
Conduction Band ◽  
Deep Level Transient Spectroscopy ◽  
Deep Level ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Channel Mobility ◽  
Transient Spectroscopy ◽  
Density Of Interface States

Constant-capacitance deep-level-transient spectroscopy (CCDLTS) characterization of traps (or states) in SiO2/SiC interfaces on the C-face was carried out to clarify the cause of low-channel mobility of SiC MOSFETs. CCDLTS measurements showed that the interface-state density (Dit) near the conduction band of SiO2/SiC interfaces fabricated using N2O oxidation was much higher than that of SiO2/SiC interfaces fabricated using wet oxidation. The high density of interface states near the conduction band is likely to be the main cause of the low mobility of MOSFETs fabricated using N2O oxidation.

Improvement of Local Deep Level Transient Spectroscopy for Microscopic Evaluation of SiO2/4H-SiC Interfaces

2018 ◽  
Vol 924 ◽  
pp. 289-292
Author(s):  
Yuji Yamagishi ◽  
Yasuo Cho
Keyword(s):  
Deep Level ◽  
Interface State ◽  
State Density ◽  
Trap States ◽  
Accurate Analysis ◽  
Microscopic Evaluation ◽  
Transient Spectroscopy ◽  
Capacitance Transient ◽  
Full Waveforms ◽  
Dimensional Mapping

We demonstrate our new local deep level spectroscopy system improved for more accurate analysis of trap states at SiO2/4H-SiC interfaces. Full waveforms of the local capacitance transient with the amplitude of attofarads and the time scale of microseconds were obtained and quantitatively analyzed. The local energy distribution of interface state density in the energy range of EC − Eit = 0.31–0.38 eV was obtained. Two-dimensional mapping of the interface states showed inhomogeneous contrasts with the lateral spatial scale of several hundreds of nanometers, suggesting that the physical origin of the trap states at SiO2/SiC interfaces is likely to be microscopically clustered.

Temperature Dependent Schottky Contacts to InP and GaAs

1991 ◽  
Vol 240 ◽  
Author(s):  
Z. Q. Shi ◽  
R. L. Wallace ◽  
W. A. Anderson
Keyword(s):  
Substrate Temperature ◽  
Fermi Level ◽  
Barrier Height ◽  
Leakage Current ◽  
Deep Level ◽  
Interface State ◽  
State Density ◽  
Fermi Level Pinning ◽  
Order Of Magnitude ◽  
Transient Spectroscopy

ABSTRACTThe barrier height of a Pd/n-InP diode was found to be increased from 0.48 to 0.96eV with the substrate temperature decreased from 300 to 77K during metal deposition. The leakage current density was reduced by more than six order of magnitude. It is obvious that the interface Fermi-level position lies well outside the variance associated with Fermi-level pinning. The barrier height for the Au/n-GaAs diode was found to be increased by about 0.25 eV with low temperature deposition and the leakage current reduced by more than five orders of magnitude. The mechanism responsible for the ultrahigh barrier height obtained at low substrate temperature was investigated by Raman spectroscopy, current voltage temperature measurement, deep level transient spectroscopy, and electroreflectance technique. The metal-insulator-semiconductor (MIS)-like structure formed at low substrate temperature and the reduction of interface state density may be the main reason for the dramatic enhancement of Schottky barrier height.

On the interface quality of MIS structures fabricated from Atomic Layer Deposition of HfO2, Ta2O5 and Nb2O5−Ta2O5−Nb2O5 dielectric thin films

2003 ◽  
Vol 786 ◽  
Author(s):  
S. Dueñas ◽  
H. Castán ◽  
H. García ◽  
J. Barbolla ◽  
K. Kukli ◽  
...  
Keyword(s):  
Thin Films ◽  
Defect Density ◽  
Deep Level ◽  
Atomic Layer ◽  
Interface State ◽  
State Density ◽  
Interface Quality ◽  
Transient Spectroscopy ◽  
Gap States ◽  
Mis Structures

ABSTRACTA study of metal-insulator-semiconductor (MIS) structures based on atomic layer deposited HfO2, Ta2O5 and Nb2O5−Ta2O5−Nb2O5 thin films is presented. Our attention was focussed on interface quality and defect density in the dielectric. Interface states as well as defects inside the insulator bulk were measured by using capacitance-voltage (C-V), deep level transient spectroscopy (DLTS) and conductance transient (G-t) techniques. Nb2O5−Ta2O5−Nb2O5 based capacitors exhibit the highest interface state density, whereas the minimum is obtained for HfO2. Conductance transients are not observed in Al/HfO2/SiO2/Si stacks, thus indicating that disordered induced gap states (DIGS) are not present in these structures. We also observed that post-metallization annealing in forming gas diminishes the trap interface density at the expense of increasing DIGS in the Al/HfO2/Si cases.

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