Development of an assembly process and reliability investigations for flip-chip LEDs using the AuSn soldering

2002 ◽  
Vol 7 (5-6) ◽  
pp. 239-243 ◽  
Author(s):  
G. Elger ◽  
M. Hutter ◽  
H. Oppermann ◽  
R. Aschenbrenner ◽  
H. Reichl ◽  
...  
Keyword(s):  
Flip Chip ◽  
Assembly Process

Flip-Chip Flux Evolution

2019 ◽  
Vol 2019 (1) ◽  
pp. 000115-000119 ◽  
Author(s):  
Andy Mackie ◽  
Hyoryoon Jo ◽  
Sze Pei Lim
Keyword(s):  
Flip Chip ◽  
Elevated Temperatures ◽  
High Volume ◽  
Automotive Electronics ◽  
Assembly Process ◽  
Surface Finishes ◽  
Solder Bumps ◽  
Thermocompression Bonding ◽  
Advanced Packaging ◽  
Flip Chip Assembly

Abstract Flip-chip assembly accounts for more than 80% of the advanced packaging technology platform, compared to fan-in, fan-out, embedded die, and through silicon via (TSV). Flip-chip interconnect remains a critical assembly process for large die used in artificial intelligence processors; thin die that warps at elevated temperatures; heterogeneous integration in SiP applications; flip-chip on leadframe; and MicroLED die usage. This paper will first outline trends in evolving flip-chip and direct chip placement (DCP) technology, then will examine the changing nature of the solder bump, the interconnect itself, and the substrate. Many variables of the flip-chip assembly process will be discussed, including standard solder bumps to micro Cu-pillar bumps with different alloys; different pad surface finishes of Cu OSP, NiAu, and solder on pad (SOP); and from regular pads on substrates to bond-on-trace applications. A major focus will be on flip-chip assembly methods, from old C4 conventional reflow processing to thermocompression bonding (TCB), and the latest laser assisted bonding (LAB) technology, with an emphasis on how the usage of different technologies necessitates different assembly materials, especially fluxes. Flip-chip fluxes such as the commonly used water-washable flux, the standard no-clean flux, and the ultra-low residue flux, and how these fluxes react to different processing methods, will be an area of discussion. Finally, the paper will examine the need for increased reliability as the technology inevitably moves into the high-volume, zero-defect arena of automotive electronics.

Surface Energy and Wettability Study of Flip Chip Packaging Materials

2011 ◽  
Vol 2011 (1) ◽  
pp. 000961-000970
Author(s):  
Jinlin Wang
Keyword(s):  
Surface Energy ◽  
Flip Chip ◽  
Substrate Surface ◽  
Solid Surfaces ◽  
Energy Calculation ◽  
Assembly Process ◽  
Flip Chip Packaging ◽  
Materials Used ◽  
Lead Free Solders ◽  
Ic Package

The surface energy of solid surfaces and surface tension of liquids are important parameters in the IC package assembly process. Wettability analyses have been completed for various materials used in the assembly process of flip chip packages, including underfills, substrates, fluxes, and lead free solders. We will highlight some of these results in this paper. We will focus our discussion on substrate surface energy analysis. A brief discussion of different surface energy methods and the liquid selection criteria will be given. The advantage and limitation of the surface energy calculation methods will be discussed. The data from several case studies will be presented. Our results show that contact angle and surface energy measurements are very useful for quality control and product development where interfacial properties are important.

Assessment of Alpha Emissivity of Packaging Materials and Method to Improve the Measurement Accuracy

2009 ◽  
Author(s):  
Peng Su ◽  
Rick Wong ◽  
Shi-Jie Wen ◽  
Li Li
Keyword(s):  
Process Control ◽  
Measurement Accuracy ◽  
Flip Chip ◽  
Error Rates ◽  
Soft Error ◽  
Packaging Materials ◽  
Assembly Process ◽  
Alpha Emission ◽  
Close Proximity ◽  
The Impact

Alpha emission from packaging materials is one of the major contributors for soft errors. Because of these materials’ immediate contact or close proximity to active areas of the silicon, even small increase in alpha emissivity may have significant impact on the performance of the device. In this work, we present the analytical steps to identify materials and manufacturing steps that caused high soft error rates for flip chip devices. We will also present some experimental results to highlight the impact of assembly process control. The results from these studies suggest that to minimize the impact of alpha emission from packaging materials, material set selection and assembly process control must be addressed simultaneously to ensure robust device performance.

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