scan circuits Latest Research Papers

POSTT: Path-oriented static test compaction for transition faults in scan circuits

2017 IEEE International Test Conference (ITC) ◽

10.1109/test.2017.8242073 ◽

2017 ◽

Author(s):

Irith Pomeranz

Keyword(s):

Static Test ◽

Test Compaction ◽

Transition Faults ◽

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Static Test Compaction for Scan Circuits by Using Restoration to Modify and Remove Tests

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2014.2358932 ◽

2014 ◽

Vol 33 (12) ◽

pp. 1955-1964 ◽

Cited By ~ 5

Author(s):

Irith Pomeranz

Keyword(s):

Static Test ◽

Test Compaction ◽

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Reduced-Complexity Transition-Fault Test Generation for Non-scan Circuits through High-Level Mutant Injection

2012 IEEE 21st Asian Test Symposium ◽

10.1109/ats.2012.47 ◽

2012 ◽

Cited By ~ 2

Author(s):

Valerio Guarnieri ◽

Franco Fummi ◽

Krishnendu Chakrabarty

Keyword(s):

Test Generation ◽

Transition Fault ◽

Reduced Complexity ◽

High Level ◽

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Test Strength: A Quality Metric for Transition Fault Tests in Full-Scan Circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2010.2057459 ◽

2011 ◽

Vol 19 (10) ◽

pp. 1907-1911

Author(s):

Irith Pomeranz ◽

Sudhakar M. Reddy

Keyword(s):

Quality Metric ◽

Transition Fault ◽

Full Scan ◽

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On RTL Testability and Gate-Level Stuck-At-Fault Coverage Correlation for Scan Circuits

2011 14th Euromicro Conference on Digital System Design ◽

10.1109/dsd.2011.51 ◽

2011 ◽

Author(s):

Michal Rumplik ◽

Josef Strnadel

Keyword(s):

Fault Coverage ◽

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Broadside and Functional Broadside Tests for Partial-Scan Circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2010.2044049 ◽

2011 ◽

Vol 19 (6) ◽

pp. 1104-1108 ◽

Cited By ~ 2

Author(s):

Irith Pomeranz ◽

Sudhakar M. Reddy

Keyword(s):

Partial Scan ◽

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On clustering of undetectable transition faults in standard-scan circuits

29th VLSI Test Symposium ◽

10.1109/vts.2011.5783772 ◽

2011 ◽

Cited By ~ 1

Author(s):

Irith Pomeranz

Keyword(s):

Transition Faults ◽

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Input Necessary Assignments for Testing of Path Delay Faults in Standard-Scan Circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2009.2031865 ◽

2011 ◽

Vol 19 (2) ◽

pp. 333-337 ◽

Cited By ~ 6

Author(s):

Irith Pomeranz ◽

Sudhakar M. Reddy

Keyword(s):

Delay Faults ◽

Path Delay ◽

Path Delay Faults ◽

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Static test compaction for diagnostic test sets of full-scan circuits

IET Computers & Digital Techniques ◽

10.1049/iet-cdt.2009.0110 ◽

2010 ◽

Vol 4 (5) ◽

pp. 365-373 ◽

Cited By ~ 1

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Diagnostic Test ◽

Static Test ◽

Test Compaction ◽

Full Scan ◽

Test Sets ◽

Scan Circuits

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On Clustering of Undetectable Single Stuck-At Faults and Test Quality in Full-Scan Circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2010.2046448 ◽

2010 ◽

Vol 29 (7) ◽

pp. 1135-1140 ◽

Cited By ~ 6

Author(s):

Irith Pomeranz ◽

Sudhakar M. Reddy

Keyword(s):

Test Quality ◽

Full Scan ◽

Scan Circuits

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Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

POSTT: Path-oriented static test compaction for transition faults in scan circuits

Static Test Compaction for Scan Circuits by Using Restoration to Modify and Remove Tests

Reduced-Complexity Transition-Fault Test Generation for Non-scan Circuits through High-Level Mutant Injection

Test Strength: A Quality Metric for Transition Fault Tests in Full-Scan Circuits

On RTL Testability and Gate-Level Stuck-At-Fault Coverage Correlation for Scan Circuits

Broadside and Functional Broadside Tests for Partial-Scan Circuits

On clustering of undetectable transition faults in standard-scan circuits

Input Necessary Assignments for Testing of Path Delay Faults in Standard-Scan Circuits

Static test compaction for diagnostic test sets of full-scan circuits

On Clustering of Undetectable Single Stuck-At Faults and Test Quality in Full-Scan Circuits

Export Citation Format

scan circuitsRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

POSTT: Path-oriented static test compaction for transition faults in scan circuits

Static Test Compaction for Scan Circuits by Using Restoration to Modify and Remove Tests

Reduced-Complexity Transition-Fault Test Generation for Non-scan Circuits through High-Level Mutant Injection

Test Strength: A Quality Metric for Transition Fault Tests in Full-Scan Circuits

On RTL Testability and Gate-Level Stuck-At-Fault Coverage Correlation for Scan Circuits

Broadside and Functional Broadside Tests for Partial-Scan Circuits

On clustering of undetectable transition faults in standard-scan circuits

Input Necessary Assignments for Testing of Path Delay Faults in Standard-Scan Circuits

Static test compaction for diagnostic test sets of full-scan circuits

On Clustering of Undetectable Single Stuck-At Faults and Test Quality in Full-Scan Circuits

scan circuits
Recently Published Documents