Stacked Chip Thermal Model Validation using Thermal Test Chips

2012 ◽  
Vol 2012 (1) ◽  
pp. 000873-000881
Author(s):  
Thomas Tarter ◽  
Bernie Siegal
Keyword(s):  
Model Validation ◽  
Thermal Model ◽  
Thermal Test ◽  
Test Chips

Thermal model validation of an electric-driven smart window through experimental data and evaluation of the impact on a case study

2020 ◽  
Vol 181 ◽  
pp. 107134 ◽  
Author(s):  
Giovanni Ciampi ◽  
Michelangelo Scorpio ◽  
Yorgos Spanodimitriou ◽  
Antonio Rosato ◽  
Sergio Sibilio
Keyword(s):  
Experimental Data ◽  
Model Validation ◽  
Thermal Model ◽  
Smart Window ◽  
The Impact

A Scalable Multi-Functional Thermal Test Chip Family: Design and Evaluation

2001 ◽  
Vol 123 (4) ◽  
pp. 323-330 ◽  
Author(s):  
Zs. Benedek ◽  
B. Courtois ◽  
G. Farkas ◽  
E. Kolla´r ◽  
S. Mir ◽  
...  
Keyword(s):  
Temperature Sensor ◽  
Thermal Characterization ◽  
Thermal Engineering ◽  
Test Chip ◽  
Basic Cell ◽  
Thermal Test ◽  
Wide Range ◽  
The Family ◽  
Test Chips

Nowadays, thermal characterization of IC packages and packaging technologies is becoming a key task in thermal engineering. To support this by measurements, we developed a family of thermal test chips that allow a wide range of possible applications. Our chips are based on the same basic cell that is mainly covered by dissipating resistors and also contains a temperature sensor. These basic cells are organized into arrays of different size. The arrays are designed such that further “super arrays” can also be built for tiling up larger package cavities. The first members of the family, TMC9 and TMC81, have been manufactured. Our measurements show that the goals aimed at the design have been achieved.

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