scholarly journals The Effect of Energy Loss Straggling on SEUs Induced by Low-Energy Protons in 28 nm FDSOI SRAMs

2019 ◽  
Vol 9 (17) ◽  
pp. 3475
Author(s):  
Lujie Zhang ◽  
Jingyan Xu ◽  
Yaqing Chi ◽  
Yang Guo

Sensitive volume thickness for silicon on insulator (SOI) devices has scaled to the point that energy loss straggling cannot be ignored within the development of the manufacturing process. In this study, irradiation experiments and Geant4 simulation were carried out to explore the influence of energy loss straggling on single event upsets (SEUs) caused by sub-8 MeV proton direct ionization. We took a 28 nm fully-depleted SOI static random-access memory (SRAM) as the research target. According to our results, the depositing energy spectrum formed by monoenergetic low-energy protons that penetrated through the sensitive volume of the target SRAM was extremely broadened. We concluded that the SEUs we observed in this article were attributed to energy loss straggling. Therefore, it is sensible to take the new mechanism into consideration when predicting proton-induced SEUs for modern nanometer SOI circuits, instead of the traditional linear energy transfer (LET) method.

2016 ◽  
Vol 65 (6) ◽  
pp. 068501
Author(s):  
Luo Yin-Hong ◽  
Zhang Feng-Qi ◽  
Wang Yan-Ping ◽  
Wang Yuan-Ming ◽  
Guo Xiao-Qiang ◽  
...  

Author(s):  
Megan C. Casey ◽  
Scott D. Stansberry ◽  
Christina M. Seidleck ◽  
Jeffrey A. Maharrey ◽  
Dante Gamboa ◽  
...  

Author(s):  
Florent Torres ◽  
Eric Kerhervé ◽  
Andreia Cathelin ◽  
Magali De Matos

Abstract This paper presents a 31 GHz integrated power amplifier (PA) in 28 nm Fully Depleted Silicon-On-Insulator Complementary Metal Oxide Semiconductor (FD-SOI CMOS) technology and targeting SoC implementation for 5 G applications. Fine-grain wide range power control with more than 10 dB tuning range is enabled by body biasing feature while the design improves voltage standing wave ratio (VSWR) robustness, stability and reverse isolation by using optimized 90° hybrid couplers and capacitive neutralization on both stages. Maximum power gain of 32.6 dB, PAEmax of 25.5% and Psat of 17.9 dBm are measured while robustness to industrial temperature range and process spread is demonstrated. Temperature-induced performance variation compensation, as well as amplitude-to-phase modulation (AM-PM) optimization regarding output power back-off, are achieved through body-bias node. This PA exhibits an International Technology Roadmap for Semiconductors figure of merit (ITRS FOM) of 26 925, the highest reported around 30 GHz to authors' knowledge.


Author(s):  
Hongkuan Yu ◽  
Tomoko Mizutani ◽  
Kiyoshi Takeuchi ◽  
Takuya Saraya ◽  
Masaharu Kobayashi ◽  
...  

Abstract Minimum operating voltages (Vmin) of every cell on a 32kb fully-depleted (FD) SOI static random access memory (SRAM) macro are successfully measured. The competing Vmin distribution models, which include the gamma and log-normal distribution, are approximated using the generalized gamma distribution (GENG). It is found that Vmin of the cells follow the gamma distribution. This finding gives a simple method to estimate worst Vmin of an SRAM macro by measuring few samples and make linear extrapolation from the gamma distribution.


2017 ◽  
Vol 64 (1) ◽  
pp. 464-470 ◽  
Author(s):  
Marta Bagatin ◽  
Simone Gerardin ◽  
Alessandro Paccagnella ◽  
Angelo Visconti ◽  
Ari Virtanen ◽  
...  

2016 ◽  
Vol 12 (1) ◽  
pp. 64-73 ◽  
Author(s):  
Zhaopeng Wei ◽  
Gilles Jacquemod ◽  
Philippe Lorenzini ◽  
Frederic Hameau ◽  
Emeric de Foucauld ◽  
...  

Sign in / Sign up

Export Citation Format

Share Document