scholarly journals Consideration of conduction mechanisms in high-k dielectric stacks as a tool to study electrically active defects

2017 ◽  
Vol 30 (4) ◽  
pp. 511-548 ◽  
Author(s):  
Albena Paskaleva ◽  
Dencho Spassov ◽  
Danijel Dankovic

In this paper conduction mechanisms which could govern the electron transport through high-k dielectrics are summarized. The influence of various factors - the type of high-k dielectric and its thickness; the doping with a certain element; the type of metal electrode as well as the measurement conditions (bias, polarity and temperature), on the leakage currents and dominant conduction mechanisms have been considered. Practical hints how to consider different conduction mechanisms and to differentiate between them are given. The paper presents an approach to assess important trap parameters from investigation of dominant conduction mechanisms.

2007 ◽  
Vol 995 ◽  
Author(s):  
Sagnik Dey ◽  
Se-Hoon Lee ◽  
Sachin V. Joshi ◽  
Prashant Majhi ◽  
Sanjay K. Banerjee

AbstractA MOSFET formed by a Si cantilever channel suspended between source/drain “anchors” wrapped all-around by high-κ dielectric and metal gate is demonstrated. The device shows excellent subthreshold characteristics and low leakage currents due to the fully depleted body and the gate-all-around architecture implemented with a high-κ dielectric and metal gate. At the same time this also allows a high drive current due to mobility enhancements arising from volume inversion of the cantilever channel such that a large ION/IOFF is achieved.


Materials ◽  
2021 ◽  
Vol 14 (4) ◽  
pp. 849
Author(s):  
Dencho Spassov ◽  
Albena Paskaleva ◽  
Elżbieta Guziewicz ◽  
Vojkan Davidović ◽  
Srboljub Stanković ◽  
...  

High-k dielectric stacks are regarded as a promising information storage media in the Charge Trapping Non-Volatile Memories, which are the most viable alternative to the standard floating gate memory technology. The implementation of high-k materials in real devices requires (among the other investigations) estimation of their radiation hardness. Here we report the effect of gamma radiation (60Co source, doses of 10 and 10 kGy) on dielectric properties, memory windows, leakage currents and retention characteristics of nanolaminated HfO2/Al2O3 stacks obtained by atomic layer deposition and its relationship with post-deposition annealing in oxygen and nitrogen ambient. The results reveal that depending on the dose, either increase or reduction of all kinds of electrically active defects (i.e., initial oxide charge, fast and slow interface states) can be observed. Radiation generates oxide charges with a different sign in O2 and N2 annealed stacks. The results clearly demonstrate a substantial increase in memory windows of the as-grown and oxygen treated stacks resulting from enhancement of the electron trapping. The leakage currents and the retention times of O2 annealed stacks are not deteriorated by irradiation, hence these stacks have high radiation tolerance.


2019 ◽  
Vol 11 (4) ◽  
pp. 607-612
Author(s):  
Hee Young Lee ◽  
Daniel J. Lichtenwalner ◽  
Jesse S. Jur ◽  
Angus I. Kingon

2002 ◽  
Vol 716 ◽  
Author(s):  
Pallavi Krishnamoorthi ◽  
A N Chandorkar

AbstractTantalum Pentaoxide, an alternative to SiO2, as a high-k dielectric for DRAM and MOS applications, faces the problem of interface mismatch at silicon. SiO2 or Si3N4 interfacial layer could help in overcoming this problem. The higher band offsets of these materials also help in the reduction of leakage currents at low electric fields. Here we study the physical and electrical characteristics of Ta, oxidized in O2:NH3 ambient, and without any other interface layer. This is done to check if N/H moves to the interface, and thus improves the electrical properties. XRD studies of the film, showed the presence of Ta2O5. Peaks corresponding to TaSi2, un-oxidized tantalum and TaN were also found in the film. But the intensity of these peaks decreased with the reduction of NH3 content. Thus a higher oxygen content could reduce the content of TaN and unoxidized tantalum. FTIR analysis however showed strong Ta=O and Si-O peaks. For the MOS capacitors, due to the presence of resistive components, the maximum capacitance was reduced, compared to that of pure Ta2O5 films. Oxide charges in the films were observed to be around 1.9E10 cm-2. But the traps in these films were found to be almost negligible as observed from the negligible hysteresis in the C-V characteristics. Films with N/H showed lesser oxide charges by an order of magnitude, as compared to pure Ta2O5 films.


2019 ◽  
Vol 21 (23) ◽  
pp. 12494-12504 ◽  
Author(s):  
Evgenyi Yakimchuk ◽  
Vladimir Volodin ◽  
Irina Antonova

G-NMP is a high-k dielectric with a permittivity of 7–9, low leakage currents of 107–108 A cm−2, an ultralow charge of −(1–4) × 1010 cm−2 and a breakdown electric field strength of (2–3) × 105 V cm−1.


2008 ◽  
Vol 55 (1) ◽  
pp. 8-20 ◽  
Author(s):  
Byoung Hun Lee ◽  
Seung Chul Song ◽  
Rino Choi ◽  
Paul Kirsch

2014 ◽  
Vol 27 (2) ◽  
pp. 259-273 ◽  
Author(s):  
Nenad Novkovski

In this paper we present an integral physical model for describing electrical and dielectric properties of MOS structures containing dielectric stack composed of a high-k dielectric (with emphasize on pure and doped Ta2O5) and an interfacial silicon dioxide or silicon oxynitride layer. Based on the model, an equivalent circuit of the structure is proposed. Validity of the model was demonstrated for structures containing different metal gates (Al, Au, Pt, W, TiN, Mo) and different Ta2O5 based high-k dielectrics, grown of bare or nitrided silicon substrates. The model describes very well the I-V characteristics of the considered structures, as well as frequency dependence of the capacitance in accumulation. Stress-induced leakage currents are also effectively analyzed by the use of the model.


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