scholarly journals Physical modeling of electrical and dielectric properties of high-k ta2o5 based MOS capacitors on silicon

2014 ◽  
Vol 27 (2) ◽  
pp. 259-273 ◽  
Author(s):  
Nenad Novkovski
Keyword(s):  
Dielectric Properties ◽  
Silicon Oxynitride ◽  
Silicon Substrates ◽  
Leakage Currents ◽  
Mos Capacitors ◽  
Metal Gates ◽  
High K ◽  
Electrical And Dielectric Properties ◽  
High K Dielectric ◽  
Mos Structures

In this paper we present an integral physical model for describing electrical and dielectric properties of MOS structures containing dielectric stack composed of a high-k dielectric (with emphasize on pure and doped Ta2O5) and an interfacial silicon dioxide or silicon oxynitride layer. Based on the model, an equivalent circuit of the structure is proposed. Validity of the model was demonstrated for structures containing different metal gates (Al, Au, Pt, W, TiN, Mo) and different Ta2O5 based high-k dielectrics, grown of bare or nitrided silicon substrates. The model describes very well the I-V characteristics of the considered structures, as well as frequency dependence of the capacitance in accumulation. Stress-induced leakage currents are also effectively analyzed by the use of the model.

Study Of Ta2O5 Based MOS Capacitors, With Tantalum Oxidized In O2:NH3 Ambient.

2002 ◽  
Vol 716 ◽  
Author(s):  
Pallavi Krishnamoorthi ◽  
A N Chandorkar
Keyword(s):  
Electric Fields ◽  
Interface Layer ◽  
Electrical Characteristics ◽  
Ftir Analysis ◽  
Leakage Currents ◽  
Mos Capacitors ◽  
High K ◽  
Order Of Magnitude ◽  
Xrd Studies ◽  
High K Dielectric

AbstractTantalum Pentaoxide, an alternative to SiO2, as a high-k dielectric for DRAM and MOS applications, faces the problem of interface mismatch at silicon. SiO2 or Si3N4 interfacial layer could help in overcoming this problem. The higher band offsets of these materials also help in the reduction of leakage currents at low electric fields. Here we study the physical and electrical characteristics of Ta, oxidized in O2:NH3 ambient, and without any other interface layer. This is done to check if N/H moves to the interface, and thus improves the electrical properties. XRD studies of the film, showed the presence of Ta2O5. Peaks corresponding to TaSi2, un-oxidized tantalum and TaN were also found in the film. But the intensity of these peaks decreased with the reduction of NH3 content. Thus a higher oxygen content could reduce the content of TaN and unoxidized tantalum. FTIR analysis however showed strong Ta=O and Si-O peaks. For the MOS capacitors, due to the presence of resistive components, the maximum capacitance was reduced, compared to that of pure Ta2O5 films. Oxide charges in the films were observed to be around 1.9E10 cm-2. But the traps in these films were found to be almost negligible as observed from the negligible hysteresis in the C-V characteristics. Films with N/H showed lesser oxide charges by an order of magnitude, as compared to pure Ta2O5 films.

New Perovskite Nanomaterials and Their Integrations into High-k Dielectrics

2011 ◽  
Vol 2011 (CICMT) ◽  
pp. 000072-000077
Author(s):  
Minoru Osada ◽  
Takayoshi Sasaki
Keyword(s):  
Dielectric Properties ◽  
Room Temperature ◽  
Bottom Electrode ◽  
Dielectric Constants ◽  
Dielectric Films ◽  
Layered Perovskite ◽  
Layer By Layer ◽  
High K ◽  
High K Dielectric ◽  
High Dielectric

We report on a bottom-up manufacturing for high-k dielectric films using a novel nanomaterial, namely, a perovskite nanosheet (LaNb2O7) derived from a layered perovskite by exfoliation. Solution-based layer-by-layer assembly of perovskite nanosheets is effective for room-temperature fabrication of high-k nanocapacitors, which are directly assembled on a SrRuO3 bottom electrode with an atomically sharp interface. These nanocapacitors exhibit high dielectric constants (k > 50) for thickness down to 5 nm while eliminating problems resulting from the size effect. We also investigate dielectric properties of perovskite nanosheets with different compositions (LaNb2O7, La0.95Eu0.05Nb2O7, and Eu0.56Ta2O7) in order to study the influence of A- and B-site modifications on dielectric properties.

scholarly journals Functional Oxide as an Extreme High-k Dielectric towards 4H-SiC MOSFET Incorporation

2017 ◽  
Vol 897 ◽  
pp. 155-158 ◽  
Author(s):  
Stephen A.O. Russell ◽  
Michael R. Jennings ◽  
Tian Xiang Dai ◽  
Fan Li ◽  
Dean P. Hamilton ◽  
...  
Keyword(s):  
Thin Film ◽  
Perovskite Phase ◽  
Buffer Layers ◽  
Mos Capacitors ◽  
Lattice Match ◽  
Polarization Voltage ◽  
High K ◽  
Buffer Material ◽  
High K Dielectric ◽  
Accumulation Region

MOS Capacitors are demonstrated on 4H-SiC using an octahedral ABO3 ferroic thin-film as a dielectric prepared on several buffer layers. Five samples were prepared: ABO3 on SiC, ABO3 on SiC with a SiO2 buffer (10 nm and 40 nm) and ABO3 on SiC with an Al2O3 buffer (10nm and 40 nm). Depending on the buffer material the oxide forms in either the pyrochlore or perovskite phase. A better lattice match with the Al2O3 buffer yields a perovskite phase with internal switchable dipoles. Hysteresis polarization-voltage loops show an oxide capacitance of ~ 0.2 μF/cm2 in the accumulation region indicating a dielectric constant of ~120.

High-k Dielectrics and Dual Metal Gates: Integration Issues for New CMOS Materials

1999 ◽  
Vol 567 ◽  
Author(s):  
B. Claflin ◽  
K. Flock ◽  
G. Lucovsky
Keyword(s):  
Oxide Semiconductor ◽  
Metal Nitrides ◽  
Mos Capacitors ◽  
Gate Electrodes ◽  
Metal Gates ◽  
High K ◽  
Dielectric Interfaces ◽  
Work Functions ◽  
Dual Metal ◽  
Cv Measurements

ABSTRACTSeveral metal and conducting metal nitride candidates were investigated for alternative gate electrode applications in future complimentary metal-oxide-semiconductor (CMOS) devices. High frequency capacitance-voltage (CV) measurements were performed on n-MOS and p-MOS capacitors with Al, Ta, TaN, TIN, or W2N gates and ultra-thin SiO2/Si3N4 dielectric stacks. The work functions of Al and Ta were close to the conduction band of Si as expected while all the metal nitrides had work functions slightly above mid-gap. The thermal stability of the metal nitrides and the metal/dielectric interfaces was studied by Auger electron spectroscopy (AES) following rapid thermal annealing (RTA). Integration requirements for dual metal gate electrodes in future CMOS devices are discussed.

Gate-All-Around (GAA) Fully Depleted (FD) Cantilever Channel MOSFET with High-k Dielectric and Metal Gate

2007 ◽  
Vol 995 ◽  
Author(s):  
Sagnik Dey ◽  
Se-Hoon Lee ◽  
Sachin V. Joshi ◽  
Prashant Majhi ◽  
Sanjay K. Banerjee
Keyword(s):  
Metal Gate ◽  
Leakage Currents ◽  
Drive Current ◽  
Fully Depleted ◽  
Low Leakage ◽  
High Drive ◽  
High K ◽  
High K Dielectric

AbstractA MOSFET formed by a Si cantilever channel suspended between source/drain “anchors” wrapped all-around by high-κ dielectric and metal gate is demonstrated. The device shows excellent subthreshold characteristics and low leakage currents due to the fully depleted body and the gate-all-around architecture implemented with a high-κ dielectric and metal gate. At the same time this also allows a high drive current due to mobility enhancements arising from volume inversion of the cantilever channel such that a large ION/IOFF is achieved.

X-Ray Reflectivity Study Of Exotic Materials For Electronic Applications

2002 ◽  
Vol 716 ◽  
Author(s):  
C.H. Russell
Keyword(s):  
Structural Parameters ◽  
Dielectric Materials ◽  
Silicon Oxynitride ◽  
Interface Roughness ◽  
Porous Films ◽  
X Ray ◽  
Robust Fitting ◽  
High K ◽  
High K Dielectric ◽  
Low K

AbstractAs device size continues to decrease, new challenges arise regarding shrinking dimensions, creating the need for thin, high-k dielectric materials, low-k dielectrics and other exotic materials. These new materials in turn create characterization issues, which cannot be resolved with traditional metrology tools. Critical structural parameters such as thickness, density, and interface roughness of a layer can be measured and monitored with X-ray reflectivity. A quick and reliable method of study regarding these materials is to base work on simulations using a very robust fitting program. This work incorporates a largely theoretical study of exotic materials of interest, including silicon oxynitride (SiOxNy), low-k (porous films) and high-k dielectrics (Ta2O5, HfO2), with a few selected experimental results.

Characterization of Mos Structures with Ultra-Thin Tunneling Oxynitride

1995 ◽  
Vol 405 ◽  
Author(s):  
H. Fujioka ◽  
C. Wann ◽  
D. Park ◽  
C. Hu
Keyword(s):  
Silicon Oxynitride ◽  
Gate Insulator ◽  
Leakage Currents ◽  
Tunneling Mechanism ◽  
Conventional Furnace ◽  
Pure Oxide ◽  
Boron Penetration ◽  
P Type ◽  
Mos Structures

AbstractCharacteristics of ultrathin silicon oxynitride (15–25Å) and its interface with Si have been investigated. Oxynitride films with thickness down to 15Å can be grown reproducibly in a conventional furnace. The leakage currents through these films can be well explained by the direct tunneling mechanism and can be fit by the same equation as that for pure oxide. This result indicates that incorporation of nitrogen atoms does not seriously affect the basic properties of the film and its interface such as the effective mass and the barrier height. A p-type poly gate MOS structure with 22Å oxynitride has also been fabricated successfully without boron penetration even using BF2+ ion implantation and a conventional furnace. Since the leakage current thorough oxynitride with this thickness is acceptable for circuit operation, thickness of the gate insulator in the dual poly-Si process can be scaled down at least to 22Å.

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