Amorphous Silicon Alloy Technology For Active Matrix Displays

1986 ◽  
Vol 70 ◽  
Author(s):  
Z. Yaniv ◽  
V. Cannella ◽  
Y. Baron ◽  
A. Lien ◽  
J. McGill
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Gate Dielectric ◽  
Flat Panel Displays ◽  
Large Area ◽  
Flat Panel ◽  
High Quality ◽  
Active Matrix ◽  
Silicon Alloy ◽  
Metal Insulator Metal

ABSTRACTThin film semiconductor devices have been investigated over the past twenty years for application in large area flat panel displays. The development of thin film transistors and diodes based on amorphous silicon (a-Si) alloy materials has made the application of these devices, to display technologies, very attractive. More recently, manufacturing techniques to produce high quality large area films of amorphous silicon alloys have been demonstrated for photovoltaic applications.Most of the current research and development effort on active matrix liquid crystal displays (LCDs) has concentrated on a-Si alloy TFTs. The success of TFT based displays for large area flat panel displays has been limited so far, mainly due to the difficulty of obtaining a high quality gate dielectric by plasma deposition and due to the presence of crossing conductors on the same substrate, both increasing the probability of defects in the display. When a two terminal sandwich device is used, on the other hand, no gate dielectric is required, hence, a higher yield can be expected. Metal-insulator-metal and hydrogenated amorphous silicon alloy devices have been proposed for incorporation in LCDs. Performance requirements for a useful active matrix switching element and a comparison among the different a-Si alloy thin film devices used for this purpose will be reviewed.

Short Channel Amorphous Silicon MOS Structures with Reduced Capacitance

1985 ◽  
Vol 49 ◽  
Author(s):  
Z. Yaniv ◽  
V. Cannella ◽  
G. Hansell ◽  
M. Vijan
Keyword(s):  
Liquid Crystal ◽  
Amorphous Silicon ◽  
Liquid Crystal Displays ◽  
Channel Length ◽  
Oblique Angle Deposition ◽  
Large Area ◽  
Short Channel ◽  
Active Matrix ◽  
Silicon Alloy ◽  
Mos Structures

AbstractWe report improvements in device structures by the reduction of capacitance in short channel length thin film transistors of amorphous silicon alloy materials. Employing techniques similar to those previously reported [1,2], these MOS structures are fabricated with channel lengths of 1 to 2 micrometers using standard photolithography with 10 micrometer minimum feature size. Significant reductions in capacitance over earlier reported device designs were achieved by improvements in device geometry and innovative use of shadowing techniques utilizing oblique angle deposition to minimize overlap between electrodes. Theses reduced capacitance short channel length TFTs enhance the possibility of fabricating on-board drivers for active matrix liquid crystal displays using amorphous silicon alloy devices. Despite the relatively low mobility of amorphous silicon (∼ 1 cm2 /V-sec) these short channel length TFTs can provide currents large enough for operation in the megahertz regime when these reductions in capacitance are incorporated. The noncritical photolithography assures that devices may be fabricated over large area substrates (8" × 8") with acceptable yields. Computer simulations predict that these TFTs will be able to provide the necessary speed for on-substrate drivers. We will present experimental results from the new TFT structures and describe modeling methods and results for amorphous silicon TFT ring oscillators. We will discuss the significance of these results as they pertain to drive circuitry for large area liquid crystal displays.

High-quality ZnS thin-film growth for flat-panel displays

1996 ◽  
Vol 4 (4) ◽  
pp. 325 ◽  
Author(s):  
W. Tong ◽  
T. K. Tran ◽  
W. Park ◽  
S. Schön ◽  
B. K. Wagner ◽  
...  
Keyword(s):  
Thin Film ◽  
Film Growth ◽  
Thin Film Growth ◽  
Flat Panel Displays ◽  
Flat Panel ◽  
High Quality

Attempts to Apply Thin Film Transistors to Electroluminescent Displays

1984 ◽  
Vol 33 ◽  
Author(s):  
M. Robert Miller
Keyword(s):  
Thin Film ◽  
Problem Solving ◽  
Thin Film Transistors ◽  
Flat Panel Displays ◽  
Huge Amount ◽  
Flat Panel ◽  
Active Matrix ◽  
Display Devices ◽  
The Subject ◽  
Problem Solving Process

ABSTRACTThe objectives of the two programs described here were to develop fabrication processes for flat panel displays using an active matrix of thin film transistors (TFT) behind an electroluminescent (EL) display medium. The programs were carried out under ERADCOM contracts DAAB07-76-C-0027 with Westinghouse R&D Center and DAAB-07-77-C-0583 with Aerojet Electrosystems Company. The huge amount of information about the processes and technology generated through the efforts of capable and dedicated people who worked on these programs was, in spite of everything, not enough to achieve the stated objectives. The fabrication processes developed did not result in repeatable, reliable display devices. The solutions applied to one set of problems tended to uncover new problems previously unseen, but this continual problem solving process probably generated more information about the technology than results from many programs in which the goals are achieved. The improved understanding of TFT processes and applicability is the subject of this report.

VLSI Processing of Amorphous Silicon Alloy P-I-N Diodes For Active Matrix Applications

1986 ◽  
Vol 70 ◽  
Author(s):  
J. McGill ◽  
V. Cannella ◽  
Z. Yaniv ◽  
P. Day ◽  
M. Vijan
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Current Density ◽  
Reverse Bias ◽  
Unit Area ◽  
Forward Bias ◽  
Bias Current ◽  
Active Matrix ◽  
Silicon Alloy ◽  
Current Densities

ABSTRACTA number of new amorphous silicon alloy microelectronic devices, including LCD active matrix displays, linear image sensors, and thin film multilayer computer memories, have been developed in our company. These applications rely heavily on the quality of the intrinsic semiconductor as well as its ability to withstand the many processing steps used in a modern photolithographic process. In this paper, we present electrical data on amorphous silicon alloy p-i-n diodes after such a process. These devices have an active area of 20μm × 20μm defined using standard photolithographic techniques and etched using a dry etch process. These diodes are characterized by ideality factors (n) of 1.4 and extrapolated reverse saturation current densities of 1013A/cm2h. The diodes exhibit nearly 10 orders of magnitude rectification at ± 3V and the reverse bias current density remains below 10-8 A/cm2 for reverse bias voltages of -15V. In pulsed forward bias, these diodes can be operated at current densities greater than 300A/cm2. Thin film amorphous silicon diodes moreover have the advantage that varying the thickness of the intrinsic layer allows the optimization of parameters such as the capacitance per unit area, the reverse bias current density and the forward bias conductance per unit area. We find that these devices are fully compatible with state of the art VLSI processing techniques and are suitable for applications in integrated circuit structures, for example rectification devices in microelectronic arrays and isolation devices in display matrices.

Short Channel Length Planar Tft's Using Amorphous Silicon Alloys

1986 ◽  
Vol 70 ◽  
Author(s):  
M. Yang ◽  
Z. Yaniv ◽  
M. Vijan ◽  
V. Cannella
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Alloy Thin Film ◽  
Large Area ◽  
Silicon Thin Film ◽  
Short Channel ◽  
Feature Size ◽  
Silicon Alloys ◽  
Silicon Alloy ◽  
Channel Lengths

ABSTRACTThere is a rapid growth of interest in the application of amorphous silicon alloy thin film devices to large area microelectronic circuits. Increased current levels are a constant goal since gains in device current result in proportional gains in power and speed. Mobility limitations in amorphous silicon thin film transistors have directed interest toward short conduction channel devices to achieve higher current levels; furthermore, compatibility with large area processing makes photolithography with 10μm feature size very attractive. Consequently, innovative techniques, which define channel lengths by processing parameters rather than by mask feature size are necessary. Previous work has applied such techniques to vertical structure TFT's which define channel lengths by the vertical height of deposited layers. Here, we report on a technique which achieves short channel lengths in planar structures using etching parameters to define short channel lengths. Amorphous silicon alloy TFTs have been fabricated with channel lengths of ≈2μm which reach currents of lma. These techniques broaden the range of application of amorphous silicon alloy TFTs by providing devices capable of operating at higher currents and higher speeds.

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