Short Channel Amorphous Silicon MOS Structures with Reduced Capacitance

We report improvements in device structures by the reduction of capacitance in short channel length thin film transistors of amorphous silicon alloy materials. Employing techniques similar to those previously reported [1,2], these MOS structures are fabricated with channel lengths of 1 to 2 micrometers using standard photolithography with 10 micrometer minimum feature size. Significant reductions in capacitance over earlier reported device designs were achieved by improvements in device geometry and innovative use of shadowing techniques utilizing oblique angle deposition to minimize overlap between electrodes. Theses reduced capacitance short channel length TFTs enhance the possibility of fabricating on-board drivers for active matrix liquid crystal displays using amorphous silicon alloy devices. Despite the relatively low mobility of amorphous silicon (∼ 1 cm2 /V-sec) these short channel length TFTs can provide currents large enough for operation in the megahertz regime when these reductions in capacitance are incorporated. The noncritical photolithography assures that devices may be fabricated over large area substrates (8" × 8") with acceptable yields. Computer simulations predict that these TFTs will be able to provide the necessary speed for on-substrate drivers. We will present experimental results from the new TFT structures and describe modeling methods and results for amorphous silicon TFT ring oscillators. We will discuss the significance of these results as they pertain to drive circuitry for large area liquid crystal displays.