Generation of Hole Traps in Silicon Dioxide Under Fowler-Nordheim Stress

1996 ◽  
Vol 428 ◽  
Author(s):  
T. Brożek ◽  
Y. D. Chan ◽  
C. R. Viswanathan
Keyword(s):  
Silicon Dioxide ◽  
High Field ◽  
Silicon Oxide ◽  
Electron Injection ◽  
Oxide Semiconductor ◽  
Hole Injection ◽  
Oxide Interface ◽  
Report Generation ◽  
Oxide Layers ◽  
Hole Trapping

AbstractHigh field electron injection in silicon oxide layers in metal-oxide-semiconductor system is widely known to degrade thin silicon oxide layers and the silicon-oxide interface, eventually leading to catastrophic oxide breakdown. In this work we report generation of hole traps under high-field stressing of thermal silicon dioxide layers on silicon. Excess hole trapping on newly generated hole traps is observed by substrate hot-hole injection in 9 nm oxide PMOS transistors after high-field Fowler-Nordheim stress followed by standard post-metallization annealing in nitrogen. The concentration of generated traps is stress-polarity dependent and increases with electron fluence during degrading stress. Relaxation behavior under switching oxide fields indicates that the nature of hole trapping sites is different from anomalous positive charge centers. A correlation of density of generated hole traps with the amount of generated electron traps shows that both types of traps are effectively generated in the oxide layer under Fowler-Nordheim tunneling electron injection.

Trapping of negative and positive charges in Ge+ ion implanted silicon dioxide layers subjected to high-field electron injection

2003 ◽  
Vol 94 (7) ◽  
pp. 4440-4448 ◽  
Author(s):  
A. N. Nazarov ◽  
T. Gebel ◽  
L. Rebohle ◽  
W. Skorupa ◽  
I. N. Osiyuk ◽  
...  
Keyword(s):  
Silicon Dioxide ◽  
High Field ◽  
Electron Injection ◽  
Field Electron ◽  
Ion Implanted

Growth of High Quality Fluorinated Silicon Dioxide for Thin Film Transistors

2002 ◽  
Vol 715 ◽  
Author(s):  
Roger Keen ◽  
Vikram L. Dalal
Keyword(s):  
Thin Film ◽  
Silicon Dioxide ◽  
Thin Film Transistors ◽  
Defect Density ◽  
Low Pressure ◽  
Gate Insulator ◽  
Oxide Semiconductor ◽  
Oxide Interface ◽  
High Quality ◽  
Interface Defect

AbstractThin film transistors(TFT) in microcrystalline and amorphous Si require high quality gate insulators that can be grown at low temperatures. In this paper, we show that one can oxidize Si wafers to produce high quality fluorinated silicon dioxide gate insulator using a low pressure remote plasma. The insulating film was grown on c-Si substrates using a low pressure ECR oxygen plasma, with small quantities of fluorine added to the mixture. Helium was used as the carrier gas for both oxygen and fluorine. The growth temperatures were in the range of 400–450 C. MOS type capacitors were made to judge the quality of the oxide/semiconductor interface, and interface defect densities were measured using capacitance-voltage techniques. It was found that when no fluorine was present in the oxide, the interface defect density was ∼1-2 x 1011/cm2 eV. The addition of F2 to oxygen immediately reduced the defect density by an order of magnitude, to ∼1.5 x 1010/cm2eV. The addition of more F2 slowly increased the defect density. Thermal cycling measurements showed that the semiconductor/oxide interface is very stable under cycling.

scholarly journals Creation of Interface States at the Silicon/Silicon Dioxide Interface by UV Light Without Hole Trapping

1989 ◽  
Vol 148 ◽  
Author(s):  
W. K. Schubert ◽  
C. H. Seager ◽  
K. L. Brower
Keyword(s):  
Silicon Dioxide ◽  
Silicon Substrate ◽  
Uv Light ◽  
Interface States ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Mos Capacitors ◽  
Hole Trapping ◽  
Creation Rate ◽  
Silicon Silicon

ABSTRACTPhotoinjection of electrons into silicon dioxide in metal-oxide-semiconductor (MOS) capacitors with 3.5 eV light is shown to create interface states with no apparent hole trapping precursor. The creation rate of these interface states depends strongly upon whether injection is from the gate metal or the silicon substrate, and on the forming gas annealing sequence used to passivate growth-induced interface states. A mechanism involving electron-induced release of hydrogen in the oxide is consistent with some aspects of the data.

n-wells voltage contrast imaging with a Focused Ion Beam

2003 ◽  
Vol 792 ◽  
Author(s):  
Erwan Le Roy ◽  
Mark Thompson
Keyword(s):  
Integrated Circuits ◽  
Focused Ion Beam ◽  
Silicon Oxide ◽  
Ion Beam ◽  
Oxide Thickness ◽  
Oxide Semiconductor ◽  
Contrast Imaging ◽  
Oxide Interface ◽  
Capacitive Properties ◽  
Capacitive Effect

Using a focused ion beam (FIB), secondary electron (SE) imaging of n-wells under oxide from the backside of thinned integrated circuits without electrical bias was accomplished. From the backside, the n-wells were initially observed at a remaining silicon thickness ∼4.5μm, which correlates to the actual implant depth where n and p carrier concentrations are equal. When the wells were FIB imaged, contrast appeared dark relative to the p substrate. During deposition of the oxide film, the n-well brightness changed from dark relative to the p-substrate, to bright. It appears that initially during this deposition step the interaction volume of the beam reached the silicon/oxide interface to create tunneling electrons. This phenomenon dominated the capacitive effect. Then as the film thickness increased the capacitive effect prevailed. The imaging structure is analogous to a Metal-Oxide-Semiconductor (MOS) capacitor. The n- and p-MOS capacitive properties yielded a permanent imaging contrast. At an optimized oxide thickness (130nm), the n-wells appear white relative to the p-substrate with a contrast up to 85% {(Ip-substrate − In-wells)/(Ipsubstrate + In-wells)}.

Effects of Reverse Biased Floating Voltage at Source and Drain During High-Field Electron Injection on the Performance of NMOSFETS

1999 ◽  
Vol 592 ◽  
Author(s):  
R. K. Jarwal ◽  
D. Misra
Keyword(s):  
High Field ◽  
Electron Injection ◽  
Channel Length ◽  
Constant Current ◽  
Oxide Interfaces ◽  
Hole Trapping ◽  
Field Electron ◽  
Voltage Degradation ◽  
Effective Channel ◽  
Threshold Voltage Degradation

ABSTRACTWe have examined the effects of reverse biased floating voltage at the source and drain junctions during constant current high-field electron injection on the performance of NMOSFETs. Device parameter degradation was studied when electrons were injected from both gate and substrate. Hole trapping and electron trapping (observed from threshold voltage degradation) were found to be enhanced with reverse biased floating voltage for devices subjected to substrate injection. On the other hand, damages in the devices subjected to gate injection were found to be minimal dependent on reverse biased voltage. Increase in current density due to reduction in effective channel length is believed to be the cause of modified device characteristics. Transconductance degradation for both substrate injection and gate injection was found to have minimal dependence on reverse biased voltage. An asymmetry in the distribution of electron traps at the gate-oxide and substrate-oxide interfaces was observed.

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