A-Si:H Thin Film Transistors and Logic Circuits Fabricated in an Integrated Multichamber System

1990 ◽  
Vol 192 ◽  
Author(s):  
S. S. Kim ◽  
C. Wang ◽  
G. N. Parsons ◽  
G. Lucovsky

ABSTRACTHydrogenated amorphous silicon (a-Si:H) thin-film-transistors (TFT’s) and logic circuits have been fabricated using a simple 3-mask process. Inverted staggered TFT structures were prepared in a multichamber UHV-compatible system that provides: 1) sequential deposition of dielectrics, and intrinsic and doped a-Si:H by remote plasma-enhanced chemical-vapor deposition (Remote PECVD) in a single deposition chamber; 2) in-situ surface analysis by Auger Electron Spectroscopy (AES); and 3) dry etching of deposited thin films by Remote plasma-enhanced etching, Remote PEE. A field-effect electron mobility of 0.74 cm2/V-s, and a threshold voltage of 2.5 Volts have been measured at room temperature in the TFTs. The on/off current ratio of the TFT exceeds 106. The a-Si:H TFT logic circuits, 2-transistor inverters and addressable 6-transistor static memory cells, operate at a supply voltage of as low as 8 Volts. The experimental results indicate that high performance a-Si:H thin film devices can be fabricated by sequential Remote plasma processing in a multichamber integrated system.

2021 ◽  
Author(s):  
Anubha Bilgaiyan ◽  
Seung-Il Cho ◽  
Miho Abiko ◽  
Kaori Watanabe ◽  
Makoto Mizukami

Abstract The low mobility and large contact resistance in organic thin-film transistors (OTFTs) are the two major limiting factors in the development of high-performance organic logic circuits. Here, solution-processed high-performance OTFTs and circuits are reported with a polymeric gate dielectric and 6,6 bis (trans-4-butylcyclohexyl)-dinaphtho[2,1-b:2,1-f ]thieno[3,2-b]thiophene (4H-21DNTT) for the organic semiconducting layer. By optimizing and controlling the fabrication conditions, a record high saturation mobility of 8.8 cm2V− 1s− 1 was demonstrated as well as large on/off ratios (> 106) for relatively short channel lengths of 15 µm and an average carrier mobility of 10.5 cm2V-1s-1 for long channel length OTFTs (> 50 µm). The pseudo-CMOS inverter circuit with a channel length of 15 µm exhibited sharp switching characteristics with a high signal gain of 31.5 at a supply voltage of 20 V. In addition to the inverter circuit, NAND logic circuits were further investigated, which also exhibited remarkable logic characteristics, with a high gain, an operating frequency of 5 kHz, and a short propagation delay of 22.1 µs. The uniform and reproducible performance of 4H-21DNTT OTFTs show potential for large-area, low-cost real-world applications on industry-compatible bottom-contact substrates.


2005 ◽  
Vol 870 ◽  
Author(s):  
Stijn De Vusser ◽  
Soeren Steudel ◽  
Kris Myny ◽  
Jan Genoe ◽  
Paul Heremans

AbstractIn this work, we report on high-performance low voltage pentacene Organic Thin-Film Transistors (OTFT's) and circuits. Inverters and ring oscillators have been designed and fabricated. At 15 V supply voltage, we have observed invertors showing a voltage gain of 9 and an output swing of more than 13 V. As for the ring oscillators, oscillations started at supply voltages as low as 8.5 V. At a supply voltage of only 15 V, a stage delay time of 3.3 νs is calculated from experimental results.We believe that these results show for the first time a high speed ring oscillator at relatively low supply voltages. The required supply voltages can be obtained by rectification using an organic (pentacene) diode. These results may have an important impact on the realization of RF-ID tags: by integrating our circuits with an organic diode, the fabrication of organic RF-ID tags comes closer.


Author(s):  
Wengao Pan ◽  
Xiaoliang Zhou ◽  
Qingping Lin ◽  
Jie Chen ◽  
Lei Lu ◽  
...  

Thin film transistors (TFT) with low cost, high mobility and low processing temperature are key enablers for practical application, which are always contradictory. In this work, we achieved high performance...


2021 ◽  
Vol 70 ◽  
pp. 49-58
Author(s):  
Bing Yang ◽  
Gang He ◽  
Wenhao Wang ◽  
Yongchun Zhang ◽  
Chong Zhang ◽  
...  

1989 ◽  
Vol 149 ◽  
Author(s):  
J. Kanicki ◽  
E. Hasan ◽  
J. Griffith ◽  
T. Takamori ◽  
J. C. Tsang

ABSTRACTDevice quality phosphorous (P) doped hydrogenated microcrystalline silicon (n+μc - Si:H) has been prepared by using the plasma enhanced chemical vapor deposition technique. The dependence of physical, chemical, structural and electrical properties on substrate temperature have been investigated. Conductivities for thick films up to 12 Ω−lcm−1 and 40 Ω−1cm−1 have been achieved for layers deposited at 300°C and 500°C, respectively. For films 50 nm thick deposited at 300°C a conductivity of about 5 Ω−1cm−1 has been obtained. A maximum average grain size around 30 nm was obtained. The etch rates of P-doped microcrystalline silicon have been found to be between 8 and 10 times higher than that of undoped hydrogenated amorphous silicon (a-Si:H) films deposited at the same temperature. Thin film transistors incorporating heavily P-doped amorphous and microcrystalline layer between source/drain metal and the a-Si:H channel have been fabricated. We show that an n+μc - Si:H source/drain contacts in thin film transistors provides very good characteristics, yielding an average effective field effect mobility, threshold voltage, and on/off current ratio of about 0.9cm2V−1 sec−1, below 4 V, and above 107, respectively.


1990 ◽  
Vol 182 ◽  
Author(s):  
B.-C. Hseih ◽  
G.A. Hawkins ◽  
S. Ashok

AbstractWe report on the characteristics of polycrystalline silicon (polysilicon) thin film transistors (TFTs) fabricated with low temperature crystallized LPCVD amorphous silicon film as an active layer and plasma enhanced chemical vapor deposition (PECVD) SiO2 as a gate insulator. High performance transistor characteristics are achieved, even though no process temperature exceeds 600°C. No threshold drift has been observed. As a result, these devices are highly suitable for application to image scanners as well as flat panel displays.


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