Properties of High Conductivity Phosphorous Doped Hydrogenated Microcrystalline Silicon and Application in Thin Film Transistor Technology

1989 ◽  
Vol 149 ◽  
Author(s):  
J. Kanicki ◽  
E. Hasan ◽  
J. Griffith ◽  
T. Takamori ◽  
J. C. Tsang
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Thin Film Transistor ◽  
Chemical Vapor ◽  
Effective Field ◽  
Microcrystalline Silicon ◽  
Average Grain Size ◽  
Vapor Deposition Technique ◽  
Structural And Electrical Properties ◽  
Hydrogenated Amorphous

ABSTRACTDevice quality phosphorous (P) doped hydrogenated microcrystalline silicon (n+μc - Si:H) has been prepared by using the plasma enhanced chemical vapor deposition technique. The dependence of physical, chemical, structural and electrical properties on substrate temperature have been investigated. Conductivities for thick films up to 12 Ω−lcm−1 and 40 Ω−1cm−1 have been achieved for layers deposited at 300°C and 500°C, respectively. For films 50 nm thick deposited at 300°C a conductivity of about 5 Ω−1cm−1 has been obtained. A maximum average grain size around 30 nm was obtained. The etch rates of P-doped microcrystalline silicon have been found to be between 8 and 10 times higher than that of undoped hydrogenated amorphous silicon (a-Si:H) films deposited at the same temperature. Thin film transistors incorporating heavily P-doped amorphous and microcrystalline layer between source/drain metal and the a-Si:H channel have been fabricated. We show that an n+μc - Si:H source/drain contacts in thin film transistors provides very good characteristics, yielding an average effective field effect mobility, threshold voltage, and on/off current ratio of about 0.9cm2V−1 sec−1, below 4 V, and above 107, respectively.

Properties and Application of Undoped Hydrogenated Microcrystalline Silicon Thin Films

1989 ◽  
Vol 149 ◽  
Author(s):  
J. Kanicki ◽  
E. Hasan ◽  
D. F. Kotecki ◽  
T. Takamori ◽  
J. H. Griffith
Keyword(s):  
Grain Size ◽  
Deposition Temperature ◽  
Etch Rate ◽  
Chemical Vapor ◽  
Microcrystalline Silicon ◽  
Silicon Thin Films ◽  
Hydrogen Dilution ◽  
Average Grain Size ◽  
Structural And Electrical Properties ◽  
Deposition Conditions

ABSTRACTDevice quality undoped hydrogenated microcrystalline silicon has been prepared by plasma enhanced chemical vapor deposition under different conditions. The dependence of physical, chemical, structural, and electrical properties on the deposition conditions has been investigated. Conductive (conductivity above 10−3Ω−1 cm−1) and resistive (conductivity around 10−9Ω−1cm−1) layers having approximately the same grain size, at a given substrate temperature, have been deposited between 200 and 500°C at two different hydrogen dilutions. Independently of the hydrogen dilution, the average grain sized is dependent on the deposition temperature and the film thickness; and a maximum average grain size of about 40 nm has been achieved for a thick film deposited at 500°C. The density of paramagnetic defects also increases with increasing deposition temperature, which indicates that more dangling bond defects are introduced as the total area of the grain boundaries increases. The etch rate decreases with increasing deposition temperature, and for the films deposited at 250 and 500°C the etch rate has been measured to be 6.6 and 2.7 nm/min, respectively. Thin film transistors incorporating a microcrystalline channel have been fabricated and evaluated. The best device had the following properties: field effect mobility, threshold voltage, and on/off current ratio of about 0.8 cm2/V sec, below 5 V, and around 106, respectively.

Thin Film Transistors Made From Hydrogenated Microcrystalline Silicon

1993 ◽  
Vol 321 ◽  
Author(s):  
K. C. Wang ◽  
B. Y. Chen ◽  
K. C. Hsu ◽  
T. R. Yew ◽  
H. L. Hwang
Keyword(s):  
Thin Film ◽  
Nuclear Magnetic Resonance ◽  
Hydrogen Atom ◽  
Vapor Deposition ◽  
Thin Film Transistors ◽  
Resonance Raman Spectroscopy ◽  
Chemical Vapor ◽  
Treatment Method ◽  
Microcrystalline Silicon ◽  
Microcrystalline Materials

ABSTRACTMicrocrystalline silicon films were deposited by diluted-hydrogen method and hydrogen-atom-treatment method at 250°C in a plasma enhanced chemical vapor deposition system and they were characterized by nuclear magnetic resonance, Raman spectroscopy, and optical bandgap Measurements. One-Mask a-Si:H thin film transistors (TFT's) were fabricated with those microcrystalline materials as the channel layer. The highest electron mobilities of the TFT's fabricated by diluted-hydrogen method and hydrogen-atom-treatment method were 1.23 and 1.04 cm2/V•s, respectively without any thermal treatment steps.

scholarly journals A Comparison between Thin-Film Transistors Deposited by Hot-Wire Chemical Vapor Deposition and PECVD

10.30544/128 ◽  
2015 ◽  
Vol 21 (1) ◽  
pp. 7-14
Author(s):  
Meysam Zarchi ◽  
Shahrokh Ahangarani
Keyword(s):  
Thin Film ◽  
Chemical Vapor Deposition ◽  
Amorphous Silicon ◽  
Vapor Deposition ◽  
Thin Film Transistors ◽  
Chemical Vapor ◽  
Silicon Films ◽  
Intrinsic Stress ◽  
Hot Wire ◽  
Microcrystalline Silicon

The effect of new growth techniques on the mobility and stability of amorphous silicon (a-Si:H) thin film transistors (TFTs) has been studied. It was suggested that the key parameter controlling the field-effect mobility and stability is the intrinsic stress in the a-Si:H layer. Amorphous and microcrystalline silicon films were deposited by radiofrequency plasma enhanced chemical vapor deposition (RF-PECVD) and hot-wire chemical vapor deposition (HW-CVD) at 100 ºC and 25 ºC. Structural properties of these films were measured by Raman Spectroscopy. Electronic properties were measured by dark conductivity, σd, and photoconductivity, σph. For amorphous silicon films deposited by RF-PECVD on PET, photosensitivity's of >105 were obtained at both 100 º C and 25 ºC. For amorphous silicon films deposited by HW-CVD, a photosensitivity of > 105 was obtained at 100 ºC. Microcrystalline silicon films deposited by HW-CVD at 95% hydrogen dilution show σph~ 10-4 Ω-1cm-1, while maintaining a photosensitivity of ~102 at both 100 ºC and 25 ºC. Microcrystalline silicon films with a large crystalline fraction (> 50%) can be deposited by HW-CVD all the way down to room temperature.

Poly-SiGe TFTs Fabricated by Low Temperature Chemical Vapor Deposition at 450°C

2001 ◽  
Vol 686 ◽  
Author(s):  
Kousaku Shimizu ◽  
Jianjun Zhang ◽  
Jeong-woo Lee ◽  
Jun-ichi Hanna
Keyword(s):  
Thin Film ◽  
Chemical Vapor Deposition ◽  
Low Temperature ◽  
Vapor Deposition ◽  
Thin Film Transistors ◽  
Gas Flow ◽  
Chemical Vapor ◽  
Polycrystalline Materials ◽  
Si Substrates ◽  
Vapor Deposition Technique

AbstractLow temperature growth of poly-SiGe has been investigated by reactive thermal chemical vapor deposition technique, which is a newly developed technique for preparing polycrystalline materials with using redox reactions in a set of source materials, Si2H6 and GeF4.. In order to prepare high uniformity and reproducibility of Si-rich poly-SiGe, total pressure, gas flow ratio, and residence time are optimized at 450°C of substrate temperature. Through optimizing the conditions, poly-Si1−xGex (x<0.04) films have been prepared in the reproducibility more than 90% and uniformity more than 88%. Bottom gate type of n-channel thin film transistors has been fabricated in various grain size of poly-Si1−xGex on SiO2 (100nm)/Si substrates. 5-36 cm2/Vs of field effect mobility of thin film transistors (L/W = 50μm/50μm) have been achieved after hydrogenation, whose threshold voltage is around 2±0.5V, and on/off ratio is more than 104.

Contact Effects in High Mobility Microcrystalline Silicon Thin-Film Transistors

2007 ◽  
Vol 989 ◽  
Author(s):  
Kah Yoong Chan ◽  
Eerke Bunte ◽  
Helmut Stiebig ◽  
Dietmar Knipp
Keyword(s):  
Thin Film ◽  
Threshold Voltage ◽  
Thin Film Transistors ◽  
High Mobility ◽  
Chemical Vapor ◽  
Channel Length ◽  
Microcrystalline Silicon ◽  
Silicon Thin Film ◽  
Short Channel ◽  
Long Channel

AbstractMicrocrystalline silicon (mc-Si:H) has recently been proven to be a promising material for thin-film transistors (TFTs). We present mc-Si:H TFTs fabricated by plasma-enhanced chemical vapor deposition at temperatures below 200°C in a condition similar to the fabrication of amorphous silicon TFTs. The mc-Si:H TFTs exhibit device mobilities exceeding 30 cm2/Vs and threshold voltages in the range of 2.5V. Such high mobilities are observed for long channel devices (50-200 mm). For short channel device (2 mm), the mobility reduces to 7 cm2/Vs. Furthermore the threshold voltage of the TFTs decreases with decreasing channel length. A simple model is developed, which explains the observed reduction of the device mobility and threshold voltage with decreasing channel length by the influence of drain and source contacts.

scholarly journals Carbon Nanotubes for Thin Film Transistor: Fabrication, Properties, and Applications

2013 ◽  
Vol 2013 ◽  
pp. 1-16 ◽  
Author(s):  
Yucui Wu ◽  
Xinnan Lin ◽  
Min Zhang
Keyword(s):  
Thin Film ◽  
Carbon Nanotubes ◽  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Thin Film Transistors ◽  
Electrical Breakdown ◽  
Thin Film Transistor ◽  
Chemical Vapor ◽  
Single Walled Carbon ◽  
Growth Method

We review the present status of single-walled carbon nanotubes (SWCNTs) for their production and purification technologies, as well as the fabrication and properties of single-walled carbon nanotube thin film transistors (SWCNT-TFTs). The most popular SWCNT growth method is chemical vapor deposition (CVD), including plasma-enhanced chemical vapor deposition (PECVD), floating catalyst chemical vapor deposition (FCCVD), and thermal CVD. Carbon nanotubes (CNTs) used to fabricate thin film transistors are sorted by electrical breakdown, density gradient ultracentrifugation, or gel-based separation. The technologies of applying CNT random networks to work as the channels of SWCNT-TFTs are also reviewed. Excellent work from global researchers has been benchmarked and analyzed. The unique properties of SWCNT-TFTs have been reviewed. Besides, the promising applications of SWCNT-TFTs have been explored. Finally, the key issues to be solved in future have been summarized.

A-Si:H Thin Film Transistors and Logic Circuits Fabricated in an Integrated Multichamber System

1990 ◽  
Vol 192 ◽  
Author(s):  
S. S. Kim ◽  
C. Wang ◽  
G. N. Parsons ◽  
G. Lucovsky
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
High Performance ◽  
Supply Voltage ◽  
Chemical Vapor ◽  
Logic Circuits ◽  
Integrated System ◽  
Remote Plasma ◽  
Hydrogenated Amorphous

ABSTRACTHydrogenated amorphous silicon (a-Si:H) thin-film-transistors (TFT’s) and logic circuits have been fabricated using a simple 3-mask process. Inverted staggered TFT structures were prepared in a multichamber UHV-compatible system that provides: 1) sequential deposition of dielectrics, and intrinsic and doped a-Si:H by remote plasma-enhanced chemical-vapor deposition (Remote PECVD) in a single deposition chamber; 2) in-situ surface analysis by Auger Electron Spectroscopy (AES); and 3) dry etching of deposited thin films by Remote plasma-enhanced etching, Remote PEE. A field-effect electron mobility of 0.74 cm2/V-s, and a threshold voltage of 2.5 Volts have been measured at room temperature in the TFTs. The on/off current ratio of the TFT exceeds 106. The a-Si:H TFT logic circuits, 2-transistor inverters and addressable 6-transistor static memory cells, operate at a supply voltage of as low as 8 Volts. The experimental results indicate that high performance a-Si:H thin film devices can be fabricated by sequential Remote plasma processing in a multichamber integrated system.

Properties of Amorphous Silicon Thin Film Transistors with Phosphorous-Doped Hydrogenated Microcrystalline Silicon

1996 ◽  
Vol 452 ◽  
Author(s):  
J. H. Choi ◽  
C. W. Kim ◽  
H. G. Yang ◽  
J. H. Souk
Keyword(s):  
Thin Film ◽  
Vapor Deposition ◽  
Thin Film Transistors ◽  
Field Effect ◽  
Chemical Vapor ◽  
Field Effect Mobility ◽  
Rf Power ◽  
Microcrystalline Silicon ◽  
Silicon Thin Film ◽  
Threshold Voltages

AbstractPhosphorous (P) doped hydrogenated microcrystallme silicon (n+μ c-Si:H) films have been prepared by using the hydrogen-diluted plasma enhanced chemical vapor deposition (PECVD) method. The crystallinity of films deposited over the range of SiH4/H2 flow ratios and RF-power is studied by Raman spectroscopy. For a 900 Å thick film deposited at 250°C, a conductivity of 71Ω−1cm−1 and an average crystallinity of 49% is obtained. n+ μ c-Si:H films as well as n+ a-Si:H films are used for both etch stopper and back channel etch type TFTs and the I4-V8 characteristics are compared. For the etch stopper type TFT, the field effect mobility of 0.85 cm2/V.sec, threshold voltages of 2 – 3 V and Ion/Ioff ratio of ∼107 are obtained.

Microcrystalline Silicon Thin-Film Transistors for Ambipolar and CMOS Inverters

2009 ◽  
Vol 1153 ◽  
Author(s):  
Kah-Yoong Chan ◽  
Aad Gordijn ◽  
Helmut Stiebig ◽  
Dietmar Knipp
Keyword(s):  
Thin Film ◽  
Charge Carrier ◽  
Power Dissipation ◽  
Thin Film Transistors ◽  
Chemical Vapor ◽  
Oxide Semiconductor ◽  
High Electron ◽  
Microcrystalline Silicon ◽  
Silicon Thin Film ◽  
Hole Charge

AbstractMicrocrystalline silicon (μc-Si:H) thin-film transistors (TFTs) have lately gained much attention due to their high charge carrier mobilities. We report on top-gate μc-Si:H TFTs fabricated by plasma-enhanced chemical vapor deposition at process temperatures below 180 °C with high electron and hole charge carrier mobilities exceeding 50 cm2/Vs and 12 cm2/Vs, respectively. Based on the μc-Si:H TFTs different thin-film inverters were realized including ambipolar and complimentary metal-oxide-semiconductor (CMOS) inverters. Microcrystalline CMOS inverters exhibit high voltage gains exceeding 22, whereas ambipolar inverters show reduced voltage gains of 10 at low operating voltages. The electrical characteristics of the μc-Si:H CMOS and ambipolar thin-film inverters will be discussed in terms of the voltage transfer curve, the voltage gain and the power dissipation.

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