Increasing The Conductivity Of Polycrystalline Silicon By Rapid Thermal Processing Before And After Ion Implantation

1986 ◽  
Author(s):  
R. B. Gregory ◽  
S. R. Wilson ◽  
W. M. Paulson ◽  
S. J. Krause ◽  
J. A. Leavitt ◽  
...  
Keyword(s):  
Ion Implantation ◽  
Thermal Processing ◽  
Polycrystalline Silicon ◽  
Rapid Thermal Processing ◽  
Before And After

Ion Implantation-Induced Defects and the Influence of Titanium Silicidation

1998 ◽  
Vol 510 ◽  
Author(s):  
D.Z. Chi ◽  
S. Ashok ◽  
D. Theodore
Keyword(s):  
Ion Implantation ◽  
Thermal Processing ◽  
Thermal Evolution ◽  
Deep Level ◽  
Rapid Thermal Processing ◽  
Current Voltage ◽  
Transient Spectroscopy ◽  
Thermal Signature ◽  
P Type ◽  
Induced Defects

AbstractThermal evolution of ion implantation-induced defects and the influence of concurrent titanium silicidation in pre-amorphized p-type Si (implanted with 25 KeV, 1016 cm2Si+) under rapid thermal processing (RTP) have been investigated. Presence of implantation-induced electrically active defects has been confirmed by current-voltage (IV) and deep level transient spectroscopy (DLTS) measurements. DLTS characterization results show that the evolution of electrically active defects in the Si implanted samples under RTP depend critically on the RTP temperature: Hole traps HI (0.33 eV) and H4 (0.47 eV) appear after the highest temperature (950 °C) anneal, while a single trap H3 (0.26 eV) shows up at lower anneal temperatures (≤ 900 °C). The thermal signature of H4 defect is very similar to that of the iron interstitial while those of HI and H3 levels appear to originate from some interstitial-related defects, possibly complexes. A most interesting finding is that the above interstitial related defects can be eliminated completely with Ti silicidation, apparently a result of vacancy injection. However the silicidation process itself introduces a new H2 (0.30 eV) level, albeit at much lower concentration. This same H2 level is also seen in unimplanted samples under RTP. The paper will present details of defect evolution under various conditions of RTP for samples with and without the self-implantation and silicidation.

Properties of Gallium Implanted Furnace and Rapidly Annealed Polycrystalline Silicon

1987 ◽  
Vol 92 ◽  
Author(s):  
H.B. Harrison ◽  
A.P. Pogany ◽  
Y. Komem
Keyword(s):  
Electrical Conductivity ◽  
Phase Transformation ◽  
Liquid Phase ◽  
Long Range ◽  
Thermal Processing ◽  
Polycrystalline Silicon ◽  
Rapid Thermal Processing ◽  
Significant Movement ◽  
Lower Temperature ◽  
Polycrystalline Silicon Films

ABSTRACTPolycrystalline silicon films have been amorphized by implantation with 100keV Ga ions of doses 0.3 and 6×1015cm−2. These films were subsequently recrystallized using either a furnace for longer times lower temperature (∼30 mins, 600° C) or rapid thermal processing (RTP) for shorter times higher temperatures ( ≤ 30 sec, 800° C, 900° C) in an endeavour to suppress any long range movement of the Ga during the anneal phase. It is found that for both the furnace and RTP for temperatures ≤ 800°C no significant movement is observed and that the lower temperature anneal for the highest dose produces the highest electrical conductivity. By contrast however, annealing at 900° C, even though the initial conductivity is higher than for any other anneal we observe a significant reduction with time and extremely rapid movement of the dopant species throughout the original poly layer. An initial rationale for this behaviour is proposed in terms of a liquid phase transformation during annealing.

The Effect of Rapid Thermal Processing on the Electrical Characteristics of Polysilicon Gate Mos Capacitors

1987 ◽  
Vol 92 ◽  
Author(s):  
Susan B. Felch ◽  
David T. Hodul ◽  
Mak Salimian Mak Salimian
Keyword(s):  
Ion Implantation ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Mos Capacitors ◽  
Patterned Wafers ◽  
Annealing Conditions ◽  
Rapid Annealing ◽  
Polysilicon Gate ◽  
Annealing Cycle ◽  
Wet Etch

ABSTRACTRapid thermal processing has previously been observed to affect the dielectric integrity of thin oxides.' In order to study this phenomenon in more detail, we have fabricated a set of wafers with 290 Å thick gate oxide and patterned pads of 2000 Å thick doped polysilicon. Some of the pads were patterned with a wet etch, while others were dry etched in a commercial reactive ion etcher (RIE), which is suspected to be a damaging process. To simulate a self-aligned MOS process, some of the patterned wafers were also ion implanted with 70 keV, 2E15 As+/cm2 . Subsequently, all of the wafers were rapidly annealed in a Varian RTP-800 lamp annealer under a variety of conditions (lO00-1100°C, 10-30 sec), and the breakdown characteristics of the MOS capacitors were measured. A few control samples were annealed in a furnace. It was found that the rapid annealing cycle without ion implantation or dry etching caused no deterioration of the oxide quality. However, rapid annealing after either RIE or implantation does result in oxide breakdowns at lower voltages, with those capacitors having higher perimeter-toarea ratios affected to a greater degree. The effect of capacitor shape and annealing conditions on breakdown statistics and uniformity will be presented and discussed in light of possible ion bombardment damage during RIE and oxide charging during ion implantation. Several mechanisms explaining the breakdown properties will be discussed.

Rapid Thermal Processing: A Bibliography

1985 ◽  
Vol 52 ◽  
Author(s):  
R. A. Powell ◽  
M. L. Manion
Keyword(s):  
Thermal Processing ◽  
Beam Energy ◽  
Polycrystalline Silicon ◽  
Rapid Thermal Processing ◽  
Compound Semiconductors ◽  
Dopant Activation ◽  
Broad Beam ◽  
Device Applications ◽  
And Diffusion

ABSTRACTThis bibliography presents 342 references to work published on rapid thermal processing (RTP) from 1979 through mid-1985. A variety of broad-beam energy sources are represented, including: arc and quartz-halogen lamps, blackbody radiators, strip heaters, broadly rastered electron beams, and defocused CO2 lasers. Citations were obtained by both manual searching and searching of a commercially available computerized data base (I NSPEC). Entries are grouped under 13 topical headings: reviews, implanted dopant activation and diffusion in silicon, polycrystalline silicon, silicides and polycides, metals, dielectrics, compound semiconductors, defects and microstructure, device applications (silicon and compound semiconductors), miscellaneous applications, equipment, and modeling. Within each group, citations are arranged alphabetically by title. A full author index is provided.

In-Situ Fabrication and Process Control Techniques in Rapid Thermal Processing

1991 ◽  
Vol 224 ◽  
Author(s):  
Mehrdad M. Moslehi ◽  
John Kuehne ◽  
Richard Yeakley ◽  
Lino Velo ◽  
Habib Najm ◽  
...  
Keyword(s):  
Process Control ◽  
Thermal Processing ◽  
Polycrystalline Silicon ◽  
High Performance ◽  
Rapid Thermal Processing ◽  
Control Techniques ◽  
In Situ Fabrication ◽  
Concurrent Use ◽  
Process Uniformity

AbstractAdvanced rapid thermal processing (RTP) equipment and sensors have been developed for in-situ fabrication of semiconductor devices. High-performance multi-zone lamp modules have been applied to various processes including rapid thermal oxidation (RTO), chemicalvapor deposition (CVD) of tungsten and amorphous/polycrystalline silicon, silicide formation, as well as high-temperature rapid thermal annealing (RTA). Concurrent use of multizone lamps and multi-point temperature sensors allows real-time wafer temperature control and process uniformity optimization. Specific experimental results will be presented on the multi-zone lamp modules, in-situ process control sensors, and single-wafer fabrication processes.

Characteristics of Arsenic Doped Polycrystalline Silicon-Gate Capacitors After Rapid Thermal Processing

1987 ◽  
Vol 106 ◽  
Author(s):  
R. Angelucci ◽  
C. Y. Wong ◽  
J. Y.-C. Sun ◽  
G. Scilla ◽  
P. A. McFarland ◽  
...  
Keyword(s):  
Work Function ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Thermal Processing ◽  
Polycrystalline Silicon ◽  
Rapid Thermal Processing ◽  
Interface States ◽  
Fixed Charges ◽  
Polysilicon Gate

ABSTRACTThe feasibility and advantages of using rapid thermal annealing to achieve a proper n+ polysilicon work function are demonstrated. Our data shows that RTA can be used to activate arsenic in the polysilicon gate after a regular furnace anneal or to diffuse and activate arsenic without any prior furnace anneal. Interface states and fixed charges due to RTA can be annealed out at 500°C for 30 min in forming gas. New insights into the diffusion, segregation, and activation of As in polysilicon during furnace and/or rapid thermal annealing have been obtained.

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