Pattern decomposition and process integration of self-aligned double patterning for 30nm node NAND FLASH process and beyond

Author(s):  
Yi-Shiang Chang ◽  
Meng-Feng Tsai ◽  
Chia-Chi Lin ◽  
Jun-Cheng Lai
2010 ◽  
Author(s):  
Yi-Shiang Chang ◽  
Jason Sweis ◽  
Jun-Cheng Lai ◽  
Chia-Chi Lin ◽  
Jonathan Yu

2007 ◽  
Author(s):  
Nobuhito Toyama ◽  
Takashi Adachi ◽  
Yuichi Inazuki ◽  
Takanori Sutou ◽  
Yasutaka Morikawa ◽  
...  

2008 ◽  
Author(s):  
M. C. Chiu ◽  
Benjamin Szu-Min Lin ◽  
M. F. Tsai ◽  
Y. S. Chang ◽  
M. H. Yeh ◽  
...  
Keyword(s):  

2015 ◽  
Vol 2015 ◽  
pp. 1-7
Author(s):  
Chun Chi Lai ◽  
Yi Wen Lu ◽  
Hung Ju Chien ◽  
Tzung Hua Ying

The gap-fill performance and process of perhydropolysilazane-based inorganic spin-on dielectric (PSZ-SOD) film in shallow trench isolation (STI) with the ultra-low dispensation amount of PSZ-SOD solution have been investigated in this study. A PSZ-SOD film process includes liner deposition, PSZ-SOD coating, and furnace curing. For liner deposition, hydrophilic property is required to improve the contact angle and gap-fill capability of PSZ-SOD coating. Prior to PSZ-SOD coating, the additional treatment on liner surface is beneficial for the fluidity of PSZ-SOD solution. The superior film thickness uniformity and gap-fill performance of PSZ-SOD film are achieved due to the improved fluidity of PSZ-SOD solution. Following that up, the low dispensation rate of PSZ-SOD solution leads to more PSZ-SOD filling in the trenches. After PSZ-SOD coating, high thermal curing process efficiently promotes PSZ-SOD film conversion into silicon oxide. Adequate conversion from PSZ-SOD into silicon oxide further increases the etching resistance inside the trenches. Integrating the above sequence of optimized factors, void-free gap-fill and well-controlled STI recess uniformity are achieved even when the PSZ-SOD solution dispensation volume is reduced 3 to 6 times compared with conventional condition for the 28 nm node NAND flash and beyond.


2013 ◽  
Author(s):  
You-Yu Lin ◽  
Chun-Chi Chen ◽  
Chia-Yu Li ◽  
Zih-Song Wang ◽  
Ching-Hua Chen
Keyword(s):  

2021 ◽  
Vol 11 (15) ◽  
pp. 6703
Author(s):  
Geun Ho Lee ◽  
Sungmin Hwang ◽  
Junsu Yu ◽  
Hyungjin Kim

In the past few decades, NAND flash memory has been one of the most successful nonvolatile storage technologies, and it is commonly used in electronic devices because of its high scalability and reliable switching properties. To overcome the scaling limit of planar NAND flash arrays, various three-dimensional (3D) architectures of NAND flash memory and their process integration methods have been investigated in both industry and academia and adopted in commercial mass production. In this paper, 3D NAND flash technologies are reviewed in terms of their architecture and fabrication methods, and the advantages and disadvantages of the architectures are compared.


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