0.18-μm technology at contact level: deep-UV process development by tuning NA/o and using a bottom antireflective coating

1999 ◽  
Author(s):  
Gilles R. Amblard ◽  
Jean-Paul E. Chollet
Keyword(s):  
Process Development ◽  
Antireflective Coating ◽  
Deep Uv

Application of polysilanes for deep-UV antireflective coating

1999 ◽  
Author(s):  
Yasunobu Onishi ◽  
Yasuhiko Sato ◽  
Eishi Shiobara ◽  
Seiro Miyoshi ◽  
Hideto Matsuyama ◽  
...  
Keyword(s):  
Antireflective Coating ◽  
Deep Uv

Top antireflective coating process for deep-UV lithography

1999 ◽  
Author(s):  
Allen C. Fung ◽  
Binder K. Mann ◽  
Ronald J. Eakin ◽  
Pierre Silvestre ◽  
Brad Williams ◽  
...  
Keyword(s):  
Coating Process ◽  
Antireflective Coating ◽  
Uv Lithography ◽  
Deep Uv

Enhancement of deep-UV patterning integrity and process control using antireflective coating

1992 ◽  
Author(s):  
Bruce W. Dudley ◽  
Susan K. Jones ◽  
Charles R. Peters ◽  
David A. Koester ◽  
Gregg A. Barnes ◽  
...  
Keyword(s):  
Process Control ◽  
Antireflective Coating ◽  
Deep Uv

Process development and impurities analysis for the bottom antireflective coating material

2001 ◽  
Author(s):  
Fu-Hsiang Ko ◽  
Hsuen-Li Chen ◽  
Tiao-Yuan Huang ◽  
Hsu-Chun Cheng ◽  
Chu-Jung Ko ◽  
...  
Keyword(s):  
Process Development ◽  
Coating Material ◽  
Antireflective Coating

Deep-UV antireflective coating: ellipsometry and XPS characterization

2000 ◽  
Vol 30 (1) ◽  
pp. 531-533 ◽  
Author(s):  
X. Boddaert ◽  
A. Caramante ◽  
E. Josse ◽  
B. Delahaye
Keyword(s):  
Antireflective Coating ◽  
Xps Characterization ◽  
Deep Uv

Inorganic antireflective coating process for deep-UV lithography

1998 ◽  
Author(s):  
Qizhi He ◽  
Wei W. Lee ◽  
Maureen A. Hanratty ◽  
Daty Rogers ◽  
Guoqiang Xing ◽  
...  
Keyword(s):  
Coating Process ◽  
Antireflective Coating ◽  
Uv Lithography ◽  
Deep Uv

Advanced TEM sample preparation techniques for submicron Si devices

1995 ◽  
Vol 53 ◽  
pp. 516-517 ◽  
Author(s):  
P. B. Basham ◽  
H. L. Tsai
Keyword(s):  
Sample Preparation ◽  
Process Development ◽  
Light Transmission ◽  
Specific Area ◽  
Turnaround Time ◽  
Small Hole ◽  
Area Of Interest ◽  
Transmission Electron ◽  
Polished Side ◽  
Preparation Techniques

The use of transmission electron microscopy (TEM) to support process development of advanced microelectronic devices is often challenged by a large amount of samples submitted from wafer fabrication areas and specific-spot analysis. Improving the TEM sample preparation techniques for a fast turnaround time is critical in order to provide a timely support for customers and improve the utilization of TEM. For the specific-area sample preparation, a technique which can be easily prepared with the least amount of effort is preferred. For these reasons, we have developed several techniques which have greatly facilitated the TEM sample preparation.For specific-area analysis, the use of a copper grid with a small hole is found to be very useful. With this small-hole grid technique, TEM sample preparation can be proceeded by well-established conventional methods. The sample is first polished to the area of interest, which is then carefully positioned inside the hole. This polished side is placed against the grid by epoxy Fig. 1 is an optical image of a TEM cross-section after dimpling to light transmission.

The Structure and Properties of MoSi2 Thin Film in Mos Process

1980 ◽  
Vol 38 ◽  
pp. 326-327
Author(s):  
C.K. Wu ◽  
P. Chang ◽  
N. Godinho
Keyword(s):  
Thin Film ◽  
Integrated Circuits ◽  
High Performance ◽  
Large Scale ◽  
Process Development ◽  
Structure And Properties ◽  
Metal Silicides ◽  
High Oxidation ◽  
Important Approach ◽  
High Oxidation Resistance

Recently, the use of refractory metal silicides as low resistivity, high temperature and high oxidation resistance gate materials in large scale integrated circuits (LSI) has become an important approach in advanced MOS process development (1). This research is a systematic study on the structure and properties of molybdenum silicide thin film and its applicability to high performance LSI fabrication.

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