Process variation challenges and resolution in the negative-tone develop double patterning for 20nm and below technology node

2015 ◽  
Author(s):  
Sohan S. Mehta ◽  
Lakshmi K. Ganta ◽  
Vikrant Chauhan ◽  
Yixu Wu ◽  
Sunil Singh ◽  
...  
Keyword(s):  
Process Variation ◽  
Technology Node ◽  
Double Patterning ◽  
Negative Tone

Double patterning overlay budget for 45 nm technology node single and double mask approach

2007 ◽  
Vol 25 (6) ◽  
pp. 2461 ◽  
Author(s):  
Pierluigi Rigolli ◽  
Catia Turco ◽  
Umberto Iessi ◽  
Gianfranco Capetti ◽  
Paolo Canestrari ◽  
...  
Keyword(s):  
Technology Node ◽  
Double Patterning

scholarly journals Materials and Processes of Negative Tone Development for Double Patterning Process

2009 ◽  
Vol 22 (5) ◽  
pp. 635-640 ◽  
Author(s):  
Shinji Tarutani ◽  
Hideaki Tsubaki ◽  
Sou Kamimura
Keyword(s):  
Double Patterning ◽  
Negative Tone

Mask process variation induced OPC accuracy in sub-90nm technology node

2006 ◽  
Author(s):  
Se-Jin Park ◽  
Yeon-Ah Shim ◽  
Jae-Hyun Kang ◽  
Jae-Young Choi ◽  
Kyung-Hee Yoon ◽  
...  
Keyword(s):  
Process Variation ◽  
Technology Node

Positive and negative tone double patterning lithography for 50nm flash memory

2006 ◽  
Author(s):  
Chang-Moon Lim ◽  
Seo-Min Kim ◽  
Young-Sun Hwang ◽  
Jae-Seung Choi ◽  
Keun-Do Ban ◽  
...  
Keyword(s):  
Flash Memory ◽  
Double Patterning ◽  
Negative Tone

Process requirements for pitch splitting LELE double patterning at advanced logic technology node

2012 ◽  
Author(s):  
R. C. Peng ◽  
I. H. Huang ◽  
H. H. Liu ◽  
H. J. Lee ◽  
John Lin ◽  
...  
Keyword(s):  
Technology Node ◽  
Double Patterning

Sub-k1 = 0.25 lithography with double patterning technique for 45-nm technology node flash memory devices at λ = 193nm

2007 ◽  
Author(s):  
Gianfranco Capetti ◽  
Pietro Cantù ◽  
Elisa Galassini ◽  
Alessandro Vaglio Pret ◽  
Catia Turco ◽  
...  
Keyword(s):  
Flash Memory ◽  
Memory Devices ◽  
Technology Node ◽  
Patterning Technique ◽  
Double Patterning

Double patterning overlay and CD budget for 32 nm technology node

2008 ◽  
Author(s):  
Umberto Iessi ◽  
Sara Loi ◽  
Antonio Salerno ◽  
Pierluigi Rigolli ◽  
Elio De Chiara ◽  
...  
Keyword(s):  
Technology Node ◽  
Double Patterning
Sign in / Sign up

Export Citation Format

Share Document