Intrinsic surface states and Fermi‐level pinning at metal–semiconductor interfaces

1978 ◽  
Vol 15 (4) ◽  
pp. 1370-1373 ◽  
Author(s):  
Eugene J. Mele ◽  
J. D. Joannopoulos
Keyword(s):  
Fermi Level ◽  
Surface States ◽  
Fermi Level Pinning ◽  
Semiconductor Interfaces

Fermi-level pinning and intrinsic surface states of Al1−xInxN(101¯0) surfaces

2017 ◽  
Vol 110 (2) ◽  
pp. 022104 ◽  
Author(s):  
V. Portz ◽  
M. Schnedler ◽  
L. Lymperakis ◽  
J. Neugebauer ◽  
H. Eisele ◽  
...  
Keyword(s):  
Fermi Level ◽  
Surface States ◽  
Fermi Level Pinning

scholarly journals Reduction of Schottky Barrier Height at Graphene/Germanium Interface with Surface Passivation

2019 ◽  
Vol 9 (23) ◽  
pp. 5014
Author(s):  
Courtin ◽  
Moréac ◽  
Delhaye ◽  
Lépine ◽  
Tricot ◽  
...  
Keyword(s):  
Fermi Level ◽  
Schottky Barrier ◽  
Barrier Height ◽  
Schottky Barrier Height ◽  
Surface Passivation ◽  
2D Materials ◽  
Semiconductor Interface ◽  
Weakly Interact ◽  
Fermi Level Pinning ◽  
Semiconductor Interfaces

Fermi level pinning at metal/semiconductor interfaces forbids a total control over the Schottky barrier height. 2D materials may be an interesting route to circumvent this problem. As they weakly interact with their substrate through Van der Waals forces, deposition of 2D materials avoids the formation of the large density of state at the semiconductor interface often responsible for Fermi level pinning. Here, we demonstrate the possibility to alleviate Fermi-level pinning and reduce the Schottky barrier height by the association of surface passivation of germanium with the deposition of 2D graphene.

MICROSCOPIC UNDERSTANDING AND CONTROL OF SURFACES AND INTERFACES OF COMPOUND SEMICONDUCTORS FOR MESOSCOPIC DEVICES

2000 ◽  
Vol 07 (05n06) ◽  
pp. 583-588 ◽  
Author(s):  
HIDEKI HASEGAWA
Keyword(s):  
Fermi Level ◽  
Surface Passivation ◽  
Surface States ◽  
Compound Semiconductors ◽  
Scanning Tunneling Spectroscopy ◽  
Scanning Tunneling ◽  
Free Surfaces ◽  
Fermi Level Pinning ◽  
Interface Control ◽  
Mesoscopic Devices

Microscopic properties of free surfaces and metal–semiconductor interfaces related to successful realization of mesoscopic devices are discussed for III–V compound semiconductors, with a particular emphasis on Fermi level pinning. Surface states causing pinning are present even on freshly MBE-grown clean (001) and (110) surfaces with well-defined surface structures. Scanning tunneling spectroscopy (STS) measurement gives anomalous spectra with large conductance gaps, and this can be explained by tip-induced local charging of surface states. Pinning on free surfaces can be considerably suppressed by a surface passivation using an ultrathin MBE-grown silicon interface control layer (Si ICL). In mesoscopic scale metal–semiconductor contacts, Fermi level pinning underneath the metal contact itself is remarkably reduced with the use of the optimum in situ electrochemical metal deposition. However, Fermi level pinning on the surrounding free surfaces has large effects on current transport and capacitance properties in such contacts.

scholarly journals Fermi-Level Pinning Mechanism in MoS2 Field-Effect Transistors Developed by Thermionic Emission Theory

2020 ◽  
Vol 10 (8) ◽  
pp. 2754
Author(s):  
Yu Zhang ◽  
Xiong Chen ◽  
Hao Zhang ◽  
Xicheng Wei ◽  
Xiangfeng Guan ◽  
...  
Keyword(s):  
Fermi Level ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Thermionic Emission ◽  
Surface States ◽  
Crystal Defects ◽  
Pinning Mechanism ◽  
Fermi Level Pinning ◽  
Order Of Magnitude ◽  
Semiconductor Contacts

Molybdenum disulfide (MoS2) field-effect transistors (FETs) with four different metallic electrodes (Au,Ag,Al,Cu) of drain-source were fabricated by mechanical exfoliation and vacuum evaporation methods. The mobilities of the devices were (Au) 21.01, (Ag) 23.15, (Al) 5.35 and (Cu) 40.52 cm2/Vs, respectively. Unpredictably, the on-state currents of four devices were of the same order of magnitude with no obvious difference. For clarifying this phenomenon, we calculated the Schottky barrier height (SBH) of the four metal–semiconductor contacts by thermionic emission theory and confirmed the existence of Fermi-level pinning (FLP). We suppose the FLP may be caused by surface states of the semiconductor produced from crystal defects.

Effect of inside-spread surface states on Fermi level pinning

1990 ◽  
Vol 238 (1-3) ◽  
pp. 271-279 ◽  
Author(s):  
J.M Palau ◽  
M Dumas
Keyword(s):  
Fermi Level ◽  
Surface States ◽  
Fermi Level Pinning

Chemical Bonding on GaAs (001) Surfaces Passivated Using SeS2

1997 ◽  
Vol 484 ◽  
Author(s):  
Jingxi Sun ◽  
Dong Ju Seo ◽  
W. L. O'Brien ◽  
F. J. Himpsel ◽  
T. F. Kuech
Keyword(s):  
Fermi Level ◽  
Surface States ◽  
Photoemission Spectroscopy ◽  
Specific Chemical ◽  
Bulk Gaas ◽  
Fermi Level Pinning ◽  
Chemical Treatments ◽  
Annealing Conditions ◽  
Outermost Surface ◽  
Synchrotron Radiation Photoemission

AbstractSelenium disulfide has been demonstrated to be an effective passivant for GaAs (001) surfaces. This chemical treatment can be more robust and effective in reducing surface-states-based Fermi level pinning than other analogous chemical treatments. We have studied SeS2-passivated surfaces, formed by treatment of GaAs in SeS2:CS2 solution, with synchrotron radiation photoemission spectroscopy. The SeS2-treated surface consists of a chemically stratified structure of several atomic layers thickness. The As-based sulfides and selenides appear to reside on the outermost surface with the Ga-based compounds adjacent to the bulk GaAs substrate. The motion of the Fermi level within the band gap was monitored during controlled annealing conditions allowing for the specific chemical moieties responsible for the reduction in surface charge to be identified. As-based species are removed at low annealing conditions with little motion of the Fermi level. GaSe-based species, formed on the surface, are clearly shown to be associated with the unpinning of the Fermi level.

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