Scan Tests with Multiple Fault Activation Cycles for Delay Faults

Author(s):  
Zhuo Zhang ◽  
S.M. Reddy ◽  
I. Pomeranz ◽  
Xijiang Lin ◽  
J. Rajski
Author(s):  
J. Gaudestad ◽  
F. Rusli ◽  
A. Orozco ◽  
M.C. Pun

Abstract A Flip Chip sample failed short between power and ground. The reference unit had 418Ω and the failed unit with the short had 16.4Ω. Multiple fault isolation techniques were used in an attempt to find the failure with thermal imaging and Magnetic Current Imaging being the only techniques capable of localizing the defect. To physically verify the defect location, the die was detached from the substrate and a die cracked was seen using a visible optical microscope.


2012 ◽  
Vol 14 ◽  
pp. 223-228 ◽  
Author(s):  
E. Vidyasagar ◽  
P.V.N. Prasad ◽  
Ather Fatima

2014 ◽  
Vol 24 (4) ◽  
pp. 477-483 ◽  
Author(s):  
Xinyu Hu ◽  
Lianguo Wang ◽  
Yinlong Lu ◽  
Mei Yu

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