An Efficient Technique for Leakage Current Estimation in Sub 65nm Scaled CMOS Circuits Based on Loading Effect

2007 ◽  
Author(s):  
Ashesh Rastogi ◽  
Wei Chen ◽  
Alodeep Sanyal ◽  
Sandip Kundu
Keyword(s):  
Leakage Current ◽  
Efficient Technique ◽  
Cmos Circuits ◽  
Loading Effect ◽  
Current Estimation ◽  
Scaled Cmos

Accurate Logic-Level Current Estimation for Digital CMOS Circuits

2006 ◽  
Vol 2 (1) ◽  
pp. 87-94
Author(s):  
P. Ruiz-de-Clavijo ◽  
J. Juan-Chico ◽  
M. J. Bellido ◽  
A. Millán ◽  
D. Guerrero ◽  
...  
Keyword(s):  
Cmos Circuits ◽  
Digital Cmos ◽  
Current Estimation ◽  
Logic Level

Testing and Diagnostics of CMOS Circuits Using Light Emission from Off-State Leakage Current

2004 ◽  
Vol 51 (9) ◽  
pp. 1455-1462 ◽  
Author(s):  
F. Stellari ◽  
P. Song ◽  
J.C. Tsang ◽  
M.K. McManus ◽  
M.B. Ketchen
Keyword(s):  
Leakage Current ◽  
Light Emission ◽  
Cmos Circuits
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