Maximum Power-Up Current Estimation in Combinational CMOS Circuits

MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference ◽

10.1109/melcon.2006.1653038 ◽

2006 ◽

Cited By ~ 6

Author(s):

A. Sagahyroon ◽

F. Aloul

Keyword(s):

Maximum Power ◽

Cmos Circuits ◽

Current Estimation

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Accurate Logic-Level Current Estimation for Digital CMOS Circuits

Journal of Low Power Electronics ◽

10.1166/jolpe.2006.010 ◽

2006 ◽

Vol 2 (1) ◽

pp. 87-94

Author(s):

P. Ruiz-de-Clavijo ◽

J. Juan-Chico ◽

M. J. Bellido ◽

A. Millán ◽

D. Guerrero ◽

...

Keyword(s):

Cmos Circuits ◽

Digital Cmos ◽

Current Estimation ◽

Logic Level

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Maximum power estimation for CMOS circuits using deterministic and statistic approaches

Proceedings of 9th International Conference on VLSI Design ◽

10.1109/icvd.1996.489636 ◽

2002 ◽

Cited By ~ 13

Author(s):

Chuan-Yu Wang ◽

K. Roy

Keyword(s):

Power Estimation ◽

Maximum Power ◽

Cmos Circuits

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Maximum current estimation in CMOS circuits

[1992] Proceedings 29th ACM/IEEE Design Automation Conference ◽

10.1109/dac.1992.227873 ◽

2003 ◽

Cited By ~ 36

Author(s):

H. Kriplani ◽

F. Najm ◽

I. Hajj

Keyword(s):

Cmos Circuits ◽

Current Estimation ◽

Maximum Current

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Maximum power estimation for CMOS circuits under arbitrary delay model

1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96 ◽

10.1109/iscas.1996.542136 ◽

2002 ◽

Cited By ~ 1

Author(s):

C.-Y. Wang ◽

T.-L. Chou ◽

K. Roy

Keyword(s):

Power Estimation ◽

Maximum Power ◽

Cmos Circuits ◽

Delay Model

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Maximum power-up current estimation of power-gated circuits

2003 5th International Conference on ASIC Proceedings (IEEE Cat No 03TH8690) ICASIC-03 ◽

10.1109/icasic.2003.1277440 ◽

2003 ◽

Author(s):

Zuying Luo ◽

Yongjun Xu ◽

Yinhe Han ◽

Xiaowei Li

Keyword(s):

Maximum Power ◽

Current Estimation

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An Efficient Technique for Leakage Current Estimation in Nanoscaled CMOS Circuits Incorporating Self-Loading Effects

IEEE Transactions on Computers ◽

10.1109/tc.2010.75 ◽

2010 ◽

Vol 59 (7) ◽

pp. 922-932 ◽

Cited By ~ 13

Author(s):

Alodeep Sanyal ◽

Ashesh Rastogi ◽

Wei Chen ◽

Sandip Kundu

Keyword(s):

Leakage Current ◽

Efficient Technique ◽

Cmos Circuits ◽

Current Estimation ◽

Loading Effects

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An Efficient Technique for Leakage Current Estimation in Sub 65nm Scaled CMOS Circuits Based on Loading Effect

20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) ◽

10.1109/vlsid.2007.32 ◽

2007 ◽

Cited By ~ 5

Author(s):

Ashesh Rastogi ◽

Wei Chen ◽

Alodeep Sanyal ◽

Sandip Kundu

Keyword(s):

Leakage Current ◽

Efficient Technique ◽

Cmos Circuits ◽

Loading Effect ◽

Current Estimation ◽

Scaled Cmos

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Using simulated annealing to generate input pairs to measure the maximum power dissipation in combinational CMOS circuits

IEICE Electronics Express ◽

10.1587/elex.2.115 ◽

2005 ◽

Vol 2 (4) ◽

pp. 115-120 ◽

Cited By ~ 1

Author(s):

Alberto Palacios Pawlovsky

Keyword(s):

Simulated Annealing ◽

Power Dissipation ◽

Maximum Power ◽

Cmos Circuits

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Maximum power estimation for CMOS circuits using deterministic and statistical approaches

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/92.661255 ◽

1998 ◽

Vol 6 (1) ◽

pp. 134-140 ◽

Cited By ~ 35

Author(s):

Chuan-Yu Wang ◽

K. Roy

Keyword(s):

Power Estimation ◽

Maximum Power ◽

Cmos Circuits ◽

Statistical Approaches

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Pattern-independent current estimation for reliability analysis of CMOS circuits

25th ACM/IEEE, Design Automation Conference.Proceedings 1988. ◽

10.1109/dac.1988.14773 ◽

2003 ◽

Cited By ~ 29

Author(s):

R. Burch ◽

F. Najm ◽

P. Yang ◽

D. Hocevar

Keyword(s):

Reliability Analysis ◽

Cmos Circuits ◽

Current Estimation

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