SEAT-LA: a soft error analysis tool for combinational logic

19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) ◽

10.1109/vlsid.2006.143 ◽

2006 ◽

Cited By ~ 74

Author(s):

R. Rajaraman ◽

J.S. Kim ◽

N. Vijaykrishnan ◽

Y. Xie ◽

M.J. Irwin

Keyword(s):

Error Analysis ◽

Soft Error ◽

Analysis Tool ◽

Combinational Logic

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A soft error analysis tool for high-speed digital designs

Proceedings of the 2nd international conference on Ubiquitous information management and communication - ICUIMC '08 ◽

10.1145/1352793.1352849 ◽

2008 ◽

Cited By ~ 2

Author(s):

Jong Kang Park ◽

Hyun Suk Choi ◽

Jong Tae Kim

Keyword(s):

Error Analysis ◽

High Speed ◽

Soft Error ◽

Analysis Tool

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Combinational Logic Soft Error Analysis and Protection

12th IEEE International On-Line Testing Symposium (IOLTS'06) ◽

10.1109/iolts.2006.17 ◽

2006 ◽

Cited By ~ 25

Author(s):

A.K. Nieuwland ◽

S. Jasarevic ◽

G. Jerin

Keyword(s):

Error Analysis ◽

Soft Error ◽

Combinational Logic

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A comprehensive soft error analysis tool for core networking system

2013 IEEE International Reliability Physics Symposium (IRPS) ◽

10.1109/irps.2013.6532111 ◽

2013 ◽

Author(s):

Haihong Zhu ◽

R. Wong ◽

Shijie Wen

Keyword(s):

Error Analysis ◽

Soft Error ◽

Analysis Tool

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An ultra-dense irradiation test structure with a NAND/NOR readout chain for characterizing soft error rates of 14nm combinational logic circuits

2017 IEEE International Electron Devices Meeting (IEDM) ◽

10.1109/iedm.2017.8268521 ◽

2017 ◽

Cited By ~ 2

Author(s):

Saurabh Kumar ◽

Minki Cho ◽

Luke Everson ◽

Hoonki Kim ◽

Qianying Tang ◽

...

Keyword(s):

Logic Circuits ◽

Error Rates ◽

Test Structure ◽

Soft Error ◽

Combinational Logic ◽

Irradiation Test ◽

Combinational Logic Circuits

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Investigating the efficiency and accuracy of a data type reduction technique for soft error analysis

2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) ◽

10.1109/icecs.2016.7841185 ◽

2016 ◽

Cited By ~ 1

Author(s):

Ghaith Kazma ◽

Ghaith Bany Hamad ◽

Otmane Ait Mohamed ◽

Yvon Savaria

Keyword(s):

Error Analysis ◽

Reduction Technique ◽

Soft Error ◽

Data Type ◽

Type Reduction

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Soft error analysis at sequential and parallel applications in ARM Cortex-A9 dual-core

2016 17th Latin-American Test Symposium (LATS) ◽

10.1109/latw.2016.7483359 ◽

2016 ◽

Cited By ~ 3

Author(s):

Gennaro Severino Rodrigues ◽

Fernanda Lima Kastensmidt

Keyword(s):

Error Analysis ◽

Soft Error ◽

Parallel Applications ◽

Dual Core

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Modeling the effect of technology trends on the soft error rate of combinational logic

Proceedings International Conference on Dependable Systems and Networks ◽

10.1109/dsn.2002.1028924 ◽

2003 ◽

Cited By ~ 804

Author(s):

P. Shivakumar ◽

M. Kistler ◽

S.W. Keckler ◽

D. Burger ◽

L. Alvisi

Keyword(s):

Error Rate ◽

Soft Error ◽

Combinational Logic ◽

Soft Error Rate ◽

Technology Trends

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An approximated soft error analysis technique for gate-level designs

IEICE Electronics Express ◽

10.1587/elex.11.20140224 ◽

2014 ◽

Vol 11 (10) ◽

pp. 20140224-20140224 ◽

Cited By ~ 1

Author(s):

Soongyu Kwon ◽

Jong Kang Park ◽

Jong Tae Kim

Keyword(s):

Error Analysis ◽

Soft Error ◽

Analysis Technique

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Neutron-induced soft error analysis in MOSFETs from a 65nm to a 25 nm design rule using multi-scale Monte Carlo simulation method

2012 IEEE International Reliability Physics Symposium (IRPS) ◽

10.1109/irps.2012.6241928 ◽

2012 ◽

Cited By ~ 3

Author(s):

Shin-ichiro Abe ◽

Yukinobu Watanabe ◽

Nozomi Shibano ◽

Nobuyuki Sano ◽

Hiroshi Furuta ◽

...

Keyword(s):

Monte Carlo Simulation ◽

Monte Carlo ◽

Error Analysis ◽

Simulation Method ◽

Soft Error ◽

Design Rule ◽

Monte Carlo Simulation Method ◽

Multi Scale

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On the Development and Implementation of a Common Spatial Error Analysis Tool

U.S. Air Force T&E Days 2010 ◽

10.2514/6.2010-1763 ◽

2010 ◽

Author(s):

Kendra Lesser ◽

David Montminy

Keyword(s):

Error Analysis ◽

Analysis Tool ◽

Spatial Error

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