12th IEEE International On-Line Testing Symposium (IOLTS'06)
Latest Publications

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Published By IEEE

0769526209

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Checker No-Harm Alarm Robustness

12th IEEE International On-Line Testing Symposium (IOLTS'06) ◽

10.1109/iolts.2006.16 ◽

2006 ◽

Cited By ~ 2

Author(s):

D. Rossi ◽

M. Omana ◽

C. Metra ◽

A. Pagni

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Emulation-based Fault Injection in Circuits with Embedded Memories

12th IEEE International On-Line Testing Symposium (IOLTS'06) ◽

10.1109/iolts.2006.29 ◽

2006 ◽

Cited By ~ 1

Author(s):

M. Garcia-Valderas ◽

M. Portela-Garcia ◽

C. Lopez-Ongil ◽

L. Entrena

Keyword(s):

Fault Injection ◽

Embedded Memories

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Designing Robust Checkers in the Presence of Massive Timing Errors

12th IEEE International On-Line Testing Symposium (IOLTS'06) ◽

10.1109/iolts.2006.22 ◽

2006 ◽

Cited By ~ 2

Author(s):

F. Worm ◽

P. Thiran ◽

P. Ienne

Keyword(s):

Timing Errors

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Trend in DRAM Soft Errors

12th IEEE International On-Line Testing Symposium (IOLTS'06) ◽

10.1109/iolts.2006.63 ◽

2006 ◽

Cited By ~ 3

Author(s):

G. Schindlbeck

Keyword(s):

Soft Errors

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Combinational Logic Soft Error Analysis and Protection

12th IEEE International On-Line Testing Symposium (IOLTS'06) ◽

10.1109/iolts.2006.17 ◽

2006 ◽

Cited By ~ 25

Author(s):

A.K. Nieuwland ◽

S. Jasarevic ◽

G. Jerin

Keyword(s):

Error Analysis ◽

Soft Error ◽

Combinational Logic

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Diophantine-Equation Based Arithmetic Test Set Embedding

12th IEEE International On-Line Testing Symposium (IOLTS'06) ◽

10.1109/iolts.2006.23 ◽

2006 ◽

Cited By ~ 6

Author(s):

D. Nikolos ◽

D. Kagaris ◽

S. Gidaros

Keyword(s):

Diophantine Equation ◽

Test Set

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Evaluating One-Hot Encoding Finite State Machines for SEU Reliability in SRAM-based FPGAs

12th IEEE International On-Line Testing Symposium (IOLTS'06) ◽

10.1109/iolts.2006.32 ◽

2006 ◽

Cited By ~ 25

Author(s):

M. Cassel ◽

F.L. Kastensmidt

Keyword(s):

Finite State Machines ◽

State Machines ◽

Finite State

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Practical Evaluation of Fault Countermeasures on an Asynchronous DES Crypto Processor

12th IEEE International On-Line Testing Symposium (IOLTS'06) ◽

10.1109/iolts.2006.50 ◽

2006 ◽

Cited By ~ 8

Author(s):

Y. Monnet ◽

M. Renaudin ◽

R. Leveugle ◽

N. Feyt ◽

P. Moitrel ◽

...

Keyword(s):

Practical Evaluation

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DMT and DT2: Two Fault-Tolerant Architectures developed by CNES for COTs-based Spacecraft Supercomputers

12th IEEE International On-Line Testing Symposium (IOLTS'06) ◽

10.1109/iolts.2006.24 ◽

2006 ◽

Cited By ~ 22

Author(s):

M.P. Pignol

Keyword(s):

Fault Tolerant

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Fault Tolerance Implementation within SRAM Based FPGA Design Based upon the Increased Level of Single Event Upset Susceptibility

12th IEEE International On-Line Testing Symposium (IOLTS'06) ◽

10.1109/iolts.2006.36 ◽

2006 ◽

Cited By ~ 23

Author(s):

M. Berg

Keyword(s):

Fault Tolerance ◽

Single Event Upset ◽

Single Event ◽

Fpga Design

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12th IEEE International On-Line Testing Symposium (IOLTS'06)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Checker No-Harm Alarm Robustness

Emulation-based Fault Injection in Circuits with Embedded Memories

Designing Robust Checkers in the Presence of Massive Timing Errors

Trend in DRAM Soft Errors

Combinational Logic Soft Error Analysis and Protection

Diophantine-Equation Based Arithmetic Test Set Embedding

Evaluating One-Hot Encoding Finite State Machines for SEU Reliability in SRAM-based FPGAs

Practical Evaluation of Fault Countermeasures on an Asynchronous DES Crypto Processor

DMT and DT2: Two Fault-Tolerant Architectures developed by CNES for COTs-based Spacecraft Supercomputers

Fault Tolerance Implementation within SRAM Based FPGA Design Based upon the Increased Level of Single Event Upset Susceptibility

12th IEEE International On-Line Testing Symposium (IOLTS'06)
Latest Publications