Design and test of latch-based circuits to maximize performance, yield, and delay test quality
2010 ◽
Vol 3
◽
pp. 283-291
2008 ◽
Vol 1
◽
pp. 104-115
◽
2015 ◽
Vol 31
(1)
◽
pp. 27-34
◽
2016 ◽
Vol 35
(1)
◽
pp. 141-154
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