scholarly journals Logic Design for On-Chip Test Clock Generation - Implementation Details and Impact on Delay Test Quality

2005 ◽  
Author(s):  
M. Beck ◽  
O. Barondeau ◽  
M. Kaibel ◽  
F. Poehl ◽  
Xijiang Lin ◽  
...  
Keyword(s):  
Logic Design ◽  
Delay Test ◽  
Test Quality ◽  
Clock Generation ◽  
On Chip

Using Programmable On-Product Clock Generation (OPCG) for Delay Test

2007 ◽  
Author(s):  
Brion Keller ◽  
Anis Uzzaman ◽  
Bibo Li ◽  
Tom Snethen
Keyword(s):  
Delay Test ◽  
Clock Generation

scholarly journals On Delay Test Quality for Test Cubes

2010 ◽  
Vol 3 ◽  
pp. 283-291
Author(s):  
Shinji Oku ◽  
Seiji Kajihara ◽  
Yasuo Sato ◽  
Kohei Miyase ◽  
Xiaoqing Wen
Keyword(s):  
Delay Test ◽  
Test Quality

scholarly journals Estimation of Delay Test Quality and Its Application to Test Generation

2008 ◽  
Vol 1 ◽  
pp. 104-115 ◽  
Author(s):  
Seiji Kajihara ◽  
Shohei Morishima ◽  
Masahiro Yamamoto ◽  
Xiaoqing Wen ◽  
Masayasu Fukunaga ◽  
...  
Keyword(s):  
Test Generation ◽  
Delay Test ◽  
Test Quality
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