scholarly journals Aliasing Probability Calculations for Arbitrary Compaction under Independently Selected Random Test Vectors

2005 ◽  
Vol 54 (12) ◽  
pp. 1614-1627 ◽  
Author(s):  
C.N. Hadjicostis
Keyword(s):  
Random Test ◽  
Aliasing Probability ◽  
Test Vectors

Dynamic-Pseudo-Random Test Sequence Generation Technique with Low Power Consumption

2011 ◽  
Vol 474-476 ◽  
pp. 655-660
Author(s):  
Sheng Jia Zheng ◽  
Jian Jun Liu ◽  
Tie Jun Li
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Fault Coverage ◽  
Low Power Consumption ◽  
Test Sequence ◽  
Test Time ◽  
Random Test ◽  
Sequence Generation ◽  
Test Sequence Generation ◽  
Test Vectors

In order to provide low power consumption LFSR seed for BIST structure，this paper proposed a seed calculation Methods of dynamic-pseudo-random test sequence, it can reseed for LFSR and cut off test sequence of the low fault coverage effectively. The seed can generation fixed length pseudo-random test sequence, the sequence reduce test time and number of test vectors mostly. Experimental results that this technique can reduce the length of vectors, shorten test time and low power consumption based on without reduce the fault coverage

Addressing Defect Coverage through Generating Test Vectors for Transistor Defects

2009 ◽  
Vol E92-A (12) ◽  
pp. 3128-3135
Author(s):  
Yoshinobu HIGAMI ◽  
Kewal K. SALUJA ◽  
Hiroshi TAKAHASHI ◽  
Shin-ya KOBAYASHI ◽  
Yuzo TAKAMATSU
Keyword(s):  
Defect Coverage ◽  
Test Vectors

Modifying Slots in Test Vectors to Validate Decoders of a Train Network

2006 ◽  
Author(s):  
Jaime Jimenez ◽  
Iker Hoyos ◽  
Jagoba Arias ◽  
Armando Astorlao ◽  
Jose L. Martin
Keyword(s):  
Test Vectors
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