DC and AC performance analysis of 25 nm symmetric/asymmetric double-gate, back-gate and bulk CMOS

Author(s):  
MeiKei Ieong ◽  
H.-S.P. Wong ◽  
Yuan Taur ◽  
P. Oldiges ◽  
D. Frank
2005 ◽  
Vol 52 (9) ◽  
pp. 2104-2107
Author(s):  
K. Kim ◽  
H.I. Hanafi ◽  
J. Cai ◽  
C.-T. Chuang

2014 ◽  
Vol 7 ◽  
pp. 39-52 ◽  
Author(s):  
Junki Kato ◽  
Shigeyoshi Watanabe ◽  
Hiroshi Ninomiya ◽  
Manabu Kobayashi ◽  
Yasuyuki Miura

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