Low power 2-D array VLSI architecture for block matching motion estimation using computation suspension

2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design and Implementation (Cat. No.00TH8528) ◽

10.1109/sips.2000.886704 ◽

2002 ◽

Author(s):

Kin-Hung Lam ◽

Chi-Ying Tsui

Keyword(s):

Motion Estimation ◽

Low Power ◽

Vlsi Architecture ◽

Block Matching

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A low-power VLSI architecture for full-search block-matching motion estimation

IEEE Transactions on Circuits and Systems for Video Technology ◽

10.1109/76.709406 ◽

1998 ◽

Vol 8 (4) ◽

pp. 393-398 ◽

Cited By ~ 86

Author(s):

V.L. Do ◽

K.Y. Yun

Keyword(s):

Motion Estimation ◽

Low Power ◽

Vlsi Architecture ◽

Block Matching ◽

Full Search

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A New Efficient VLSI Architecture for Full Search Block Matching Motion Estimation

IFIP Advances in Information and Communication Technology - SOC Design Methodologies ◽

10.1007/978-0-387-35597-9_22 ◽

2002 ◽

pp. 253-264 ◽

Cited By ~ 3

Author(s):

Nuno Roma ◽

Leonel Sousa

Keyword(s):

Motion Estimation ◽

Vlsi Architecture ◽

Block Matching ◽

Full Search

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A Low-Power Systolic Array Architecture for Block-Matching Motion Estimation

IEICE Transactions on Electronics ◽

10.1093/ietele/e88-c.4.559 ◽

2005 ◽

Vol E88-C (4) ◽

pp. 559-569 ◽

Cited By ~ 14

Author(s):

J. MIYAKOSHI

Keyword(s):

Motion Estimation ◽

Low Power ◽

Systolic Array ◽

Block Matching ◽

Array Architecture

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A Fast and Low-power VLSI Architecture for Half-pixel Motion Estimation Using Two-step Search Algorithm for HDTV Application

IETE Journal of Research ◽

10.4103/0377-2063.83648 ◽

2011 ◽

Vol 57 (3) ◽

pp. 263 ◽

Cited By ~ 1

Author(s):

SumitK Chatterjee ◽

Indrajit Indrajit

Keyword(s):

Motion Estimation ◽

Low Power ◽

Search Algorithm ◽

Vlsi Architecture

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A low power architecture for a new efficient block-matching motion estimation algorithm

Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144) ◽

10.1109/mwscas.2000.951677 ◽

2002 ◽

Author(s):

H.A. Mahmoud ◽

M.A. Bayoumi ◽

B. Wilson

Keyword(s):

Motion Estimation ◽

Low Power ◽

Estimation Algorithm ◽

Block Matching ◽

Motion Estimation Algorithm ◽

Power Architecture

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Low-power parallel tree architecture for full search block-matching motion estimation

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) ◽

10.1109/iscas.2004.1329271 ◽

2004 ◽

Author(s):

Siou-Shen Lin ◽

Po-Chih Tseng ◽

Liang-Gee Chen

Keyword(s):

Motion Estimation ◽

Low Power ◽

Block Matching ◽

Tree Architecture ◽

Full Search

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VLSI architecture for block-matching motion estimation algorithm

IEEE Transactions on Circuits and Systems for Video Technology ◽

10.1109/76.143416 ◽

1992 ◽

Vol 2 (2) ◽

pp. 169-175 ◽

Cited By ~ 163

Author(s):

C.-H. Hsieh ◽

T.-P. Lin

Keyword(s):

Motion Estimation ◽

Vlsi Architecture ◽

Estimation Algorithm ◽

Block Matching ◽

Motion Estimation Algorithm

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Efficient sub-pixel interpolation and low power VLSI architecture for fractional motion estimation in H.264/AVC

2010 4th International Conference on Signal Processing and Communication Systems ◽

10.1109/icspcs.2010.5709764 ◽

2010 ◽

Cited By ~ 3

Author(s):

Obianuju Ndili ◽

Tokunbo Ogunfunmi

Keyword(s):

Motion Estimation ◽

Low Power ◽

Vlsi Architecture ◽

Pixel Interpolation ◽

Fractional Motion Estimation

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VLSI architecture for motion estimation using the block-matching algorithm

Proceedings ED&TC European Design and Test Conference ◽

10.1109/edtc.1996.494318 ◽

2002 ◽

Cited By ~ 13

Author(s):

C. Sanz ◽

M.J. Garrido ◽

J.M. Meneses

Keyword(s):

Motion Estimation ◽

Vlsi Architecture ◽

Block Matching ◽

Matching Algorithm ◽

Block Matching Algorithm

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A low power VLSI architecture for multistage interval-based motion estimation (MIME) algorithm

Third International Workshop on Digital and Computational Video, 2002. DCV 2002. Proceedings. ◽

10.1109/dcv.2002.1218757 ◽

2004 ◽

Author(s):

H. Mahmoud ◽

S. Goel ◽

M. Shaaban ◽

T. Darwish ◽

M. Bayoumi

Keyword(s):

Motion Estimation ◽

Low Power ◽

Vlsi Architecture

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