Drop Test Reliability Improvement of Lead-free Fine Pitch BGA Using Different Solder Ball Composition

Author(s):  
C. Birzer ◽  
B. Rakow ◽  
R. Steiner ◽  
J. Walter
Author(s):  
R S Chen ◽  
H E Cheng ◽  
R W Wu ◽  
C H Huang ◽  
W C Liao ◽  
...  

This article describes the board-level drop reliability of thin-profile fine-pitch ball grid array (TFBGA) subjected to Joint Electron Device Engineering Council (JEDEC) drop test conditions featuring an impact pulse profile with a peak acceleration of 1500  G and a pulse duration of 0.5 ms. The solder ball is assumed to be an elastoplastic model and the other components linear elastic ones. Both the global/local finite element and the finite grid region methods are introduced to improve the accuracy and the convergence during the meshing process. Meanwhile, the contact impact process during the drop test is translated into the effective support excitation load on the printed circuit board (PCB) through the support excitation scheme to simplify the analysis. By means of optimal parameters of the Taguchi robust design, the average stress of the solder ball at the PCB side surface becomes 80.9 MPa, which shows a 57 per cent reduction compared to the original stress of 189.7 MPa. As a result, the impact reliability of the TFBGA package is significantly improved. Finally, the JEDEC drop test is conducted to verify the optimal results obtained by the Taguchi method.


Author(s):  
Andrew Farris ◽  
Jianbiao Pan ◽  
Albert Liddicoat ◽  
Brian J. Toleno ◽  
Dan Maslyk ◽  
...  
Keyword(s):  

Author(s):  
J. Walter ◽  
R. Fischer ◽  
C. Birzer

Abstract During the last few years the drop test has become more and more important for electronic handheld components. Drop test reliability for lead-free solder interconnects is an extreme challenge today. Thus, the need for improved micro structural diagnostics of new material combinations and crack detection methods has increased. The target of this paper is to summarize detection and analysis methods for solder joint cracks, material characterization [1] and preparation methods of assembled printed circuit boards (PCB) after a drop test to completely understand lead-free solder interconnect reliability in fine pitch ball grid array packages (FBGA). In particular, we will introduce the outstanding advantages of embedded cross-sections combined with ion beam polishing (IBP), dye- or rather resin-penetration, selective tin etch and micro-hardness measurements.


Author(s):  
Don-Son Jiang ◽  
Joe Hung ◽  
Yu-Po Wang ◽  
C. S. Hsiao

For handheld or portable telecommunication devices such as mobile phone, PDA, etc., board level joint reliability during drop impact is a great concern to simulate mishandling during usage. In general, solder composition and substrate surface finish would principally determine the solder joint reliability. Board level drop test reliability of two solder compositions (SnPb and lead free SnAgCu) and surface finishes (Ni/Au and OSP) were examined in this study. The result indicated SnAgCu lead free solder showed poorer reliability life than Sn-Pb solder during drop impact. The crack path in SnPb solder joint almost went through bulk solder near substrate side. However, another IMC/Ni interfacial failure mode near substrate side was found in SnAgCu solder to cause lower reliability. This difference could attribute to higher strength of SnAgCu solder and deformation with higher strain rate in drop test. Comparison between two surface finishes indicated Ni/Au is better than OSP in both SnPb and SnAgCu lead free solder joints. In SnAgCu lead free solder joint with OSP, there are thicker Cu6Sn5 IMC and many large Ag3Sn IMC plates in interface to degrade the interfacial bonding, so drop impact would easily cause the all cracks through IMC/Cu interface and then reduce the reliability.


2006 ◽  
Vol 29 (1) ◽  
pp. 1-9 ◽  
Author(s):  
Y. Liu ◽  
G. Tian ◽  
S. Gale ◽  
R.W. Johnson ◽  
L. Crane
Keyword(s):  

Materials ◽  
2021 ◽  
Vol 14 (12) ◽  
pp. 3353
Author(s):  
Marina Makrygianni ◽  
Filimon Zacharatos ◽  
Kostas Andritsos ◽  
Ioannis Theodorakos ◽  
Dimitris Reppas ◽  
...  

Current challenges in printed circuit board (PCB) assembly require high-resolution deposition of ultra-fine pitch components (<0.3 mm and <60 μm respectively), high throughput and compatibility with flexible substrates, which are poorly met by the conventional deposition techniques (e.g., stencil printing). Laser-Induced Forward Transfer (LIFT) constitutes an excellent alternative for assembly of electronic components: it is fully compatible with lead-free soldering materials and offers high-resolution printing of solder paste bumps (<60 μm) and throughput (up to 10,000 pads/s). In this work, the laser-process conditions which allow control over the transfer of solder paste bumps and arrays, with form factors in line with the features of fine pitch PCBs, are investigated. The study of solder paste as a function of donor/receiver gap confirmed that controllable printing of bumps containing many microparticles is feasible for a gap < 100 μm from a donor layer thickness set at 100 and 150 μm. The transfer of solder bumps with resolution < 100 μm and solder micropatterns on different substrates, including PCB and silver pads, have been achieved. Finally, the successful operation of a LED interconnected to a pin connector bonded to a laser-printed solder micro-pattern was demonstrated.


Author(s):  
Vithyacharan Retnasamy ◽  
Zaliman Sauli ◽  
Phaklen Ehkan ◽  
Steven Taniselass

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