Cracking and delamination at the interfaces of different materials in plastic IC packages is a well-known failure mechanism. The investigation of local stress behavior, including characterization of stress singularities, is an important problem in predicting and preventing crack initiation and propagation. In this study, a three-dimensional finite element procedure is used to compute the strength of stress singularities at various three-dimensional corners in a typical Flip-Chip assembled Chip-on-Board (FCOB) package. It is found that the stress singularities at the three-dimensional corners are always more severe than those at the corresponding two-dimensional edges, which suggests that they are more likely to be the potential delamination sites. Furthermore, it is demonstrated that the stress singularity at the upper silicon die/epoxy fillet edge can be completely eliminated by an appropriate choice in geometry. A weak stress singularity at the FR4 board/epoxy edge is shown to exist, with a stronger singularity located at the internal die/epoxy corner. The influence of the epoxy contact angle and the FR4 glass fiber orientation on stress state is also investigated. A general result is that the strength of the stress singularity increases with increased epoxy contact angle. In addition, it is shown that the stress singularity effect can be minimized by choosing an appropriate orientation between the glass fiber in the FR4 board and the silicon die. Based on these results, several guidelines for minimizing edge stresses in IC packages are presented. [S1043-7398(00)00904-X]
Principal Mechanisms That Determine the Local Stress Distribution in Stacked Chips Mounted by Flip Chip Technology