Module camber effect on card assembly and reliability for large flip chip BGA organic packages

Author(s):  
Isabel de Sousa ◽  
Heather McCormick ◽  
Hua Lu ◽  
Robert Martel ◽  
Sylvain Ouimet
Keyword(s):  
2020 ◽  
pp. 57-62
Author(s):  
Olga Yu. Kovalenko ◽  
Yulia A. Zhuravlyova

This work contains analysis of characteristics of automobile lamps by Philips, KOITO, ETI flip chip LEDs, Osram, General Electric (GE), Gtinthebox, OSLAMPledbulbs with H1, H4, H7, H11 caps: luminous flux, luminous efficacy, correlated colour temperature. Characteristics of the studied samples are analysed before the operation of the lamps. The analysis of the calculation results allows us to make a conclusion that the values of correlated colour temperature of halogen lamps are close to the parameters declared by manufacturers. The analysis of the study results has shown that, based on actual values of correlated colour temperature, it is not advisable to use LED lamps in unfavourable weather conditions (such as rain, fog, snow). The results of the study demonstrate that there is a slight dispersion of actual values of luminous flux of halogen lamps by different manufacturers. Maximum variation between values of luminous flux of different lamps does not exceed 14 %. The analysis of the measurement results has shown that actual values of luminous flux of all halogen lamps comply with the mandatory rules specified in the UN/ECE Regulation No. 37 and luminous flux of LED lamps exceeds maximum allowable value by more than 8 %. Luminous efficacy of LED lamps is higher than that of halogen lamps: more than 82 lm/W and lower power consumption. The results of the measurements have shown that power consumption of a LED automobile lamp is lower than that of similar halogen lamps by 3 times and their luminous efficacy is higher by 5 times.


2018 ◽  
Author(s):  
Daechul Choi ◽  
Yoonseong Kim ◽  
Jongyun Kim ◽  
Han Kim

Abstract In this paper, we demonstrate cases for actual short and open failures in FCB (Flip Chip Bonding) substrates by using novel non-destructive techniques, known as SSM (Scanning Super-conducting Quantum Interference Device Microscopy) and Terahertz TDR (Time Domain Reflectometry) which is able to pinpoint failure locations. In addition, the defect location and accuracy is verified by a NIR (Near Infra-red) imaging system which is also one of the commonly used non-destructive failure analysis tools, and good agreement was made.


Author(s):  
George F. Gaut

Abstract Access to the solder bump and under-fill material of flip-chip devices has presented a new problem for failure analysts. The under-fill and solder bumps have also added a new source for failure causes. A new tool has become available that can reduce the time required to analyze this area of a flip-chip package. By using precision selective area milling it is possible to remove material (die or PCB) that will allow other tools to expose the source of the failure.


Author(s):  
Andrew J. Komrowski ◽  
N. S. Somcio ◽  
Daniel J. D. Sullivan ◽  
Charles R. Silvis ◽  
Luis Curiel ◽  
...  

Abstract The use of flip chip technology inside component packaging, so called flip chip in package (FCIP), is an increasingly common package type in the semiconductor industry because of high pin-counts, performance and reliability. Sample preparation methods and flows which enable physical failure analysis (PFA) of FCIP are thus in demand to characterize defects in die with these package types. As interconnect metallization schemes become more dense and complex, access to the backside silicon of a functional device also becomes important for fault isolation test purposes. To address these requirements, a detailed PFA flow is described which chronicles the sample preparation methods necessary to isolate a physical defect in the die of an organic-substrate FCIP.


Author(s):  
O. Diaz de Leon ◽  
M. Nassirian ◽  
C. Todd ◽  
R. Chowdhury

Abstract Integration of circuits on semiconductor devices with resulting increase in pin counts is driving the need for improvements in packaging for functionality and reliability. One solution to this demand is the Flip- Chip concept in Ultra Large Scale Integration (ULSI) applications [1]. The flip-chip technology is based on the direct attach principle of die to substrate interconnection.. The absence of bondwires clearly enables packages to become more slim and compact, and also provides higher pin counts and higher-speeds [2]. However, due to its construction, with inherent hidden structures the Flip-Chip technology presents a challenge for non-destructive Failure Analysis (F/A). The scanning acoustic microscope (SAM) has recently emerged as a valuable evaluation tool for this purpose [3]. C-mode scanning acoustic microscope (C-SAM), has the ability to demonstrate non-destructive package analysis while imaging the internal features of this package. Ultrasonic waves are very sensitive, particularly when they encounter density variations at surfaces, e.g. variations such as voids or delaminations similar to air gaps. These two anomalies are common to flip-chips. The primary issue with this package technology is the non-uniformity of the die attach through solder ball joints and epoxy underfill. The ball joints also present defects as open contacts, voids or cracks. In our acoustic microscopy study packages with known defects are considered. It includes C-SCAN analysis giving top views at a particular package interface and a B-SCAN analysis that provides cross-sectional views at a desired point of interest. The cross-section analysis capability gives confidence to the failure analyst in obtaining information from a failing area without physically sectioning the sample and destroying its electrical integrity. Our results presented here prove that appropriate selection of acoustic scanning modes and frequency parameters leads to good reliable correlation between the physical defects in the devices and the information given by the acoustic microscope.


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