Thermo-Mechanical Reliability of High-End Flip Chip BGA Packages: Comparison Heat Spreader and Motherboard Construction

2005 ◽  
Author(s):  
Sang Ha Kim ◽  
Han Park ◽  
K. Suzuki
Keyword(s):  
Flip Chip ◽  
Mechanical Reliability ◽  
Heat Spreader ◽  
Bga Packages

Norris–Landzberg Acceleration Factors and Goldmann Constants for SAC305 Lead-Free Electronics

2012 ◽  
Vol 134 (3) ◽  
Author(s):  
Pradeep Lall ◽  
Aniket Shirgaokar ◽  
Dinesh Arunachalam
Keyword(s):  
Regression Models ◽  
Flip Chip ◽  
Reliability Prediction ◽  
Harsh Environments ◽  
Mechanical Reliability ◽  
Accelerated Test ◽  
Thermal Reliability ◽  
Area Array ◽  
Bga Packages ◽  
Part Selection

Goldmann constants and Norris–Landzberg acceleration factors for SAC305 lead-free solders have been developed based on principal component regression models (PCR) for reliability prediction and part selection of area-array packaging architectures under thermo-mechanical loads. Models have been developed in conjunction with stepwise regression methods for identification of the main effects. Package architectures studied include ball-grid array (BGA) packages mounted on copper-core and no-core printed circuit assemblies in harsh environments. The models have been developed based on thermomechanical reliability data acquired on copper-core and no-core assemblies in four different thermal cycling conditions. Packages with Sn3Ag0.5Cu solder alloy interconnects have been examined. The models have been developed based on perturbation of accelerated test thermomechanical failure data. Data have been gathered on nine different thermal cycle conditions with SAC305 alloys. The thermal cycle conditions differ in temperature range, dwell times, maximum temperature, and minimum temperature to enable development of constants needed for the life prediction and assessment of acceleration factors. Goldmann constants and the Norris–Landzberg acceleration factors have been benchmarked against previously published values. In addition, model predictions have been validated against validation datasets which have not been used for model development. Convergence of statistical models with experimental data has been demonstrated using a single factor design of experimental study for individual factors including temperature cycle magnitude, relative coefficient of thermal expansion, and diagonal length of the chip. The predicted and measured acceleration factors have also been computed and correlated. Good correlations have been achieved for parameters examined. Previously, the feasibility of using multiple linear regression models for reliability prediction has been demonstrated for flex-substrate BGA packages (Lall et al., 2004, “Thermal Reliability Considerations for Deployment of Area Array Packages in Harsh Environments,” Proceedings of the ITherm 2004, 9th Intersociety Conference on Thermal and Thermo-mechanical Phenomena, Las Vegas, Nevada, Jun. 1–4, pp. 259–267, Lall et al., 2005, “Thermal Reliability Considerations for Deployment of Area Array Packages in Harsh Environments,” IEEE Trans. Compon. Packag. Technol., 28(3), pp. 457–466., flip-chip packages (Lall et al., 2005, “Decision-Support Models for Thermo-Mechanical Reliability of Leadfree Flip-Chip Electronics in Extreme Environments,” Proceedings of the 55th IEEE Electronic Components and Technology Conference, Orlando, FL, Jun. 1–3, pp. 127–136) and ceramic BGA packages (Lall et al., 2007, “Thermo-Mechanical Reliability Based Part Selection Models for Addressing Part Obsolescence in CBGA, CCGA, FLEXBGA, and Flip-Chip Packages,” ASME InterPACK Conference, Vancouver, British Columbia, Canada, Jul. 8–12, Paper No. IPACK2007-33832, pp. 1–18). The presented methodology is valuable in the development of fatigue damage constants for the application specific accelerated test datasets and provides a method to develop institutional learning based on prior accelerated test data.

An Investigation of Thermal Enhancement on Flip Chip Plastic BGA Packages Using CFD Tool

1999 ◽  
Author(s):  
Tien-Yu Tom Lee
Keyword(s):  
Heat Transfer ◽  
Heat Sink ◽  
Flip Chip ◽  
Front Surface ◽  
Total Power ◽  
Heat Spreader ◽  
Bga Packages ◽  
Free Air ◽  
Thermal Enhancement ◽  
Computational Fluid Dynamics Cfd

Abstract This paper demonstrates the advantage of applying Predictive Engineering in thermal assessment of a 279 I/Os, 6-layer, depopulated array flip chip PBGA package. Thermal simulation was conducted using a Computational Fluid Dynamics (CFD) tool to analyze the heat transfer and fluid flow in a free air environment. This study first described the modeling techniques on multilayer substrate, thermal vias, C5 ball, and PCB. For a flip chip package without any thermal enhancement, more than 90% of the total power was conducted from the front surface of the die through the solder ball interconnects to the substrate, then to the board. To enhance the thermal performance of the package, the heat transfer area from the backside of the die needs to increase dramatically. Several thermal enhancing techniques were examined. These methods included copper heat spreader with various thicknesses and with thermal pads, metallic lid, overmolded with and without heat spreader, and with heat sink. With an aluminum lid and a heat sink, it gave the best improvement; followed by a heat spreader with thermal pads. Both methods reduced thermal resistance by an average of 50%. Detailed analyses on heat flow projections are discussed.

Interfacial Compounds Characteristic and Its Reliability Effects on SAC305 Microjoints in Flip Chip Assemblies

2018 ◽  
Vol 140 (3) ◽  
Author(s):  
Ye Tian ◽  
Ning Ren ◽  
Xiaoxia Jian ◽  
Tie Geng ◽  
Yiping Wu
Keyword(s):  
Site Effects ◽  
Flip Chip ◽  
Fe Simulation ◽  
Great Influence ◽  
Underlying Mechanism ◽  
Edge Region ◽  
Mechanical Reliability ◽  
Reaction Products ◽  
Interfacial Imcs ◽  
Center Region

This study mainly focuses on site effects of the Ni pad interface on intermetallic compounds (IMCs) characteristic during assembly reflowing, and attempts to provide a reasonable explanation for this particular finding. Besides, the changes of the resulting IMCs characteristic are characterized during thermal shock (TS) cycling, and their potential influences on thermal–mechanical reliability of microjoints are evaluated experimentally and numerically. The results show that the site on the Ni pad interface of silicon chip has great influence on interfacial reaction products, i.e., interfacial IMCs. After bumps soldering, a great amount of larger diamond-shaped (Cu, Ni)6Sn5 compounds were densely packed at the edge region, while some smaller ones were only scattered at the center region. Moreover, substantial particle-shaped (Ni, Cu)3Sn4 compounds as well as some rod-shaped ones emerged at the spaces between the (Cu, Ni)6Sn5 compounds of the center region. More importantly, such site effects were remained in the microjoints during TS cycling, which induced the formation of larger protruding (Cu, Ni)6Sn5 compounds. Finite element (FE) simulation results showed that the stress was mainly concentrated at the top of the protruding (Cu, Ni)6Sn5 compounds, which can be a critical reason to cause the crack occurrence. Furthermore, the underlying mechanism of the interfacial IMCs characteristic induced by the site effects was attempted to propose during bumps soldering.

Quality Monitors and Inspection Criteria for Bare Die Flip Chip Ball Grid Array and Bare Die PoP Packages.

2014 ◽  
Vol 2014 (1) ◽  
pp. 000533-000536
Author(s):  
Kiran Vanam ◽  
Anthony Newman ◽  
Mori Poustinchi ◽  
Stephen Stewart
Keyword(s):  
Form Factor ◽  
High Temperature ◽  
Flip Chip ◽  
Lower Cost ◽  
Smart Phone ◽  
Ball Grid Array ◽  
Heat Spreader ◽  
Fine Line ◽  
Key Drivers ◽  
Test Operations

Package form factor and cost are one of the key drivers in smart phone and tablet landscape. In order to meet these requirements hand held market has seen emergence of bare die flip chip ball grid array (BD FCBGA) and bare die package on package (BD PoP). As the name implies, these packages don't have a mold cap or heat spreader surrounding the silicon die resulting in lower cost and smaller form factor. Further package thickness reduction is possible by thinning of silicon die without significantly affecting high temperature (HT) warpage or coplanarity. One of the main concerns with aforementioned bare die package (BDP) configurations is die crack failure during assembly, testing, shipping or surface mount operation (SMT). The propensity of die crack failures further increases as thinner die is employed to meet overall package height requirements. This work focusses on evaluating various inspection tools for detecting gross die cracks to fine line cracks up to ~ 0.7 μm wide. Some of the key considerations for inspection tools, at assembly and test operations will be presented.

Reliability of Underfill-Encapsulated Flip-Chips With Heat Spreaders

1998 ◽  
Vol 120 (4) ◽  
pp. 322-327 ◽  
Author(s):  
H. Doi ◽  
K. Kawano ◽  
A. Yasukawa ◽  
T. Sato
Keyword(s):  
Mechanical Properties ◽  
Fatigue Life ◽  
Thermal Cycling ◽  
Failure Mode ◽  
Flip Chip ◽  
Solder Joints ◽  
Alumina Substrate ◽  
Heat Spreader ◽  
Flip Chips ◽  
Heat Spreaders

The effect of a heat spreader on the life of the solder joints for underfill-encapsulated, flip-chip packages is investigated through stress analyses and thermal cycling tests. An underfill with suitable mechanical properties is found to be able to prolong the fatigue life of the solder joints even in a package with a heat spreader and an alumina substrate. The delamination of the underfill from the chip is revealed as another critical failure mode for which the shape of the underfill fillet has a large effect.

Mechanical and Thermal Board Level Reliability Comparison Between Electroless Ni Im. Au and Solder on Pad Surface Finishes for Large Flip Chip BGA Packages

2006 ◽  
Author(s):  
Gnyaneshwar Ramakrishna ◽  
Donghyun Kim ◽  
Mudasir Ahamad ◽  
Lavanya Gopalakrishnan ◽  
Mason Hu ◽  
...  
Keyword(s):  
Surface Finish ◽  
Flip Chip ◽  
High Reliability ◽  
Electroless Nickel ◽  
Temperature Cycling ◽  
Design Parameters ◽  
Temperature Cycle ◽  
Bga Packages ◽  
Reliability And Robustness ◽  
Board Level

Large Flip Chip BGA (FCBGA) packages are needed in high pin out applications (>1800), e.g., ASIC's and are typically used in high reliability and robustness applications. Hence understanding the package reliability and robustness becomes one of paramount importance for efficient product design. There are various aspects to the package that need to be understood, to ensure an effective design. The focus of this paper is to understand the BGA reliability of the package with particular reference to comparison of the surface finish, vis-a`-vis, between Electroless Nickel Immersion Gold (ENIG) and Solder On Pad (SOP) on the substrate side of the package, which are the typical solutions for large plastic FC-BGA packages. Tests, which include board level temperature cycling, monotonic bend and shock testing have been conducted to compare the two surface finish options. The results of these tests demonstrate that the mechanical strength of the interface exceeds by a factor of two for the SOP surface finish, while BGA design parameters play a key role in ensuring comparative temperature cycle reliability in comparison with ENIG packages.

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