Flip-chip package with a heat spreader for high power dissipation LSI chips

2003 ◽  
Author(s):  
H. Ando ◽  
H. Kikuchi ◽  
T. Sato
Keyword(s):  
High Power ◽  
Power Dissipation ◽  
Flip Chip ◽  
Heat Spreader

Transparent Heat Spreader for Backside Optical Analysis of High Power GHz-Scale Microprocessors

2000 ◽  
Author(s):  
Travis M. Eiles ◽  
Dean Hunt ◽  
David Chi
Keyword(s):  
High Power ◽  
Integrated Circuit ◽  
Flip Chip ◽  
Cooling System ◽  
Heat Spreader ◽  
Standard Configuration ◽  
Degree Of Stability ◽  
Optical Probing ◽  
System Requirements ◽  
High Degree

Abstract Optical probing using the Schlumberger IDS-2000 and other infrared-based analysis techniques have proved to be critical in the debug and analysis of flip-chip-packaged microprocessors. During probing, processors are operating with test patterns that generate a large amount of power. This article demonstrates a method for dissipating the generated heat based on a diamond window-based transparent heat spreader. This method controls the microprocessor temperature to a high degree of stability, and reduces thermal gradients across the die. Waveform results are excellent, and the transparent heat spreader provides a path for optical probing to be applied to the entire range of integrated circuit applications. The discussion covers cooling system requirements, and standard configuration specifications, and shows how the transparent heat spreader technique is effective for probing high power microprocessors.

scholarly journals High-Power GaN-Based Vertical Light-Emitting Diodes on 4-Inch Silicon Substrate

Nanomaterials ◽  
2019 ◽  
Vol 9 (8) ◽  
pp. 1178 ◽  
Author(s):  
Qiang Zhao ◽  
Jiahao Miao ◽  
Shengjun Zhou ◽  
Chengqun Gui ◽  
Bin Tang ◽  
...  
Keyword(s):  
High Power ◽  
Silicon Substrate ◽  
Flip Chip ◽  
Heat Dissipation ◽  
Light Emitting Diodes ◽  
Light Output ◽  
Current Spreading ◽  
Light Emitting ◽  
Fabry Perot ◽  
Lift Off

We demonstrate high-power GaN-based vertical light-emitting diodes (LEDs) (VLEDs) on a 4-inch silicon substrate and flip-chip LEDs on a sapphire substrate. The GaN-based VLEDs were transferred onto the silicon substrate by using the Au–In eutectic bonding technique in combination with the laser lift-off (LLO) process. The silicon substrate with high thermal conductivity can provide a satisfactory path for heat dissipation of VLEDs. The nitrogen polar n-GaN surface was textured by KOH solution, which not only improved light extract efficiency (LEE) but also broke down Fabry–Pérot interference in VLEDs. As a result, a near Lambertian emission pattern was obtained in a VLED. To improve current spreading, the ring-shaped n-electrode was uniformly distributed over the entire VLED. Our combined numerical and experimental results revealed that the VLED exhibited superior heat dissipation and current spreading performance over a flip-chip LED (FCLED). As a result, under 350 mA injection current, the forward voltage of the VLED was 0.36 V lower than that of the FCLED, while the light output power (LOP) of the VLED was 3.7% higher than that of the FCLED. The LOP of the FCLED saturated at 1280 mA, but the light output saturation did not appear in the VLED.

High Power CPU Cooling Experiment

1995 ◽  
Author(s):  
Elizabeth B. Nadworny ◽  
T. Gary Yip ◽  
Nader Farag
Keyword(s):  
Heat Transfer ◽  
High Power ◽  
Power Dissipation ◽  
Heat Removal ◽  
Data Acquisition System ◽  
Heat Sinks ◽  
Small Scale ◽  
Heat Transfer Area ◽  
Pin Fin ◽  
Transfer Parameters

Abstract This experimental study focuses on the enhancement of the heat removal process by modifying the geometry of pin fin heat sinks, while maintaining the same effective heat transfer area. The pins are cut at an angle to reduce the blockage of air flow across the surface. To perform this study, a small scale wind tunnel facility has been designed specifically for testing high power dissipation processors and other ULSI components. The facility is fully automated and controlled by an HP3852A Data Acquisition System interfaced with a 486 based PC computer. The average surface temperature, Reynolds number, Nusselt number and other relevant heat transfer parameters were reduced from the data collected. Results from the study show that a heat sink with an angled trailing edge produces the greatest enhancement of heat removal. The mechanism for the improved heat transfer is the larger temperature gradient across the surface, which is obtained by lowering the minimum temperature on the surface.

Quality Monitors and Inspection Criteria for Bare Die Flip Chip Ball Grid Array and Bare Die PoP Packages.

2014 ◽  
Vol 2014 (1) ◽  
pp. 000533-000536
Author(s):  
Kiran Vanam ◽  
Anthony Newman ◽  
Mori Poustinchi ◽  
Stephen Stewart
Keyword(s):  
Form Factor ◽  
High Temperature ◽  
Flip Chip ◽  
Lower Cost ◽  
Smart Phone ◽  
Ball Grid Array ◽  
Heat Spreader ◽  
Fine Line ◽  
Key Drivers ◽  
Test Operations

Package form factor and cost are one of the key drivers in smart phone and tablet landscape. In order to meet these requirements hand held market has seen emergence of bare die flip chip ball grid array (BD FCBGA) and bare die package on package (BD PoP). As the name implies, these packages don't have a mold cap or heat spreader surrounding the silicon die resulting in lower cost and smaller form factor. Further package thickness reduction is possible by thinning of silicon die without significantly affecting high temperature (HT) warpage or coplanarity. One of the main concerns with aforementioned bare die package (BDP) configurations is die crack failure during assembly, testing, shipping or surface mount operation (SMT). The propensity of die crack failures further increases as thinner die is employed to meet overall package height requirements. This work focusses on evaluating various inspection tools for detecting gross die cracks to fine line cracks up to ~ 0.7 μm wide. Some of the key considerations for inspection tools, at assembly and test operations will be presented.

Thermal and Mechanical Characterization of High Power GaN Packages

2011 ◽  
Vol 2011 (1) ◽  
pp. 000361-000366
Author(s):  
Don Willis ◽  
Gary Gu ◽  
Daniel Jin ◽  
Rob Dry
Keyword(s):  
Thermal Performance ◽  
High Power ◽  
Mechanical Analysis ◽  
Heat Spreader ◽  
Element Analysis ◽  
Die Attach ◽  
Viable Solution ◽  
Alternative Approach ◽  
Thermal Improvement ◽  
Multiple Devices

The typical package available for high power GaN application has the devices directly attached onto a metal flange, which could contribute significantly to the overall thermal resistance. This paper discusses an alternative approach to packaging both single and multiple devices through a heat spreader, which could potentially improve thermal performance and bring significant benefits to assembly in yields and cost. However, the heat spreader could also introduce significant CTE mis-match and potential concerns in reliability. Nonlinear 3D finite element analysis (FEA) was conducted to characterize the thermal performance and evaluate mechanical/reliability concerns. Thermal modeling considered single and multiple die applications, and the results show13–15% thermal improvement with the copper heat spreader. Mechanical analysis focused on the thermal loads of the die attach and solder reflow processes. It reveals that the die attach process is more critical as shown in the higher stress due to higher thermal load, but stress/strain levels appear to be acceptable. Thus, this alternative approach could be a viable solution.

Reliability of Underfill-Encapsulated Flip-Chips With Heat Spreaders

1998 ◽  
Vol 120 (4) ◽  
pp. 322-327 ◽  
Author(s):  
H. Doi ◽  
K. Kawano ◽  
A. Yasukawa ◽  
T. Sato
Keyword(s):  
Mechanical Properties ◽  
Fatigue Life ◽  
Thermal Cycling ◽  
Failure Mode ◽  
Flip Chip ◽  
Solder Joints ◽  
Alumina Substrate ◽  
Heat Spreader ◽  
Flip Chips ◽  
Heat Spreaders

The effect of a heat spreader on the life of the solder joints for underfill-encapsulated, flip-chip packages is investigated through stress analyses and thermal cycling tests. An underfill with suitable mechanical properties is found to be able to prolong the fatigue life of the solder joints even in a package with a heat spreader and an alumina substrate. The delamination of the underfill from the chip is revealed as another critical failure mode for which the shape of the underfill fillet has a large effect.

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