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Adaptive Temperature-Aware SoC Test Scheduling Considering Process Variation
2011 14th Euromicro Conference on Digital System Design
◽
10.1109/dsd.2011.29
◽
2011
◽
Cited By ~ 7
Author(s):
Nima Aghaee
◽
Zebo Peng
◽
Petru Eles
Keyword(s):
Process Variation
◽
Test Scheduling
◽
Soc Test
Download Full-text
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References
Temperature-Aware SoC Test Scheduling Considering Inter-Chip Process Variation
2010 19th IEEE Asian Test Symposium
◽
10.1109/ats.2010.74
◽
2010
◽
Cited By ~ 10
Author(s):
Nima Aghaee
◽
Zhiyuan He
◽
Zebo Peng
◽
Petru Eles
Keyword(s):
Process Variation
◽
Test Scheduling
◽
Soc Test
Download Full-text
Process-Variation and Temperature Aware SoC Test Scheduling Technique
Journal of Electronic Testing
◽
10.1007/s10836-013-5374-z
◽
2013
◽
Vol 29
(4)
◽
pp. 499-520
◽
Cited By ~ 10
Author(s):
Nima Aghaee
◽
Zebo Peng
◽
Petru Eles
Keyword(s):
Process Variation
◽
Test Scheduling
◽
Soc Test
◽
Scheduling Technique
Download Full-text
Process-variation and temperature aware soc test scheduling using particle swarm optimization
2011 IEEE 6th International Design and Test Workshop (IDT)
◽
10.1109/idt.2011.6123092
◽
2011
◽
Cited By ~ 3
Author(s):
Nima Aghaee
◽
Zebo Peng
◽
Petru Eles
Keyword(s):
Particle Swarm Optimization
◽
Process Variation
◽
Particle Swarm
◽
Test Scheduling
◽
Swarm Optimization
◽
Soc Test
Download Full-text
SOC test scheduling using simulated annealing
Proceedings. 21st VLSI Test Symposium, 2003.
◽
10.1109/vtest.2003.1197670
◽
2003
◽
Cited By ~ 36
Author(s):
Wei Zou
◽
S.M. Reddy
◽
I. Pomeranz
◽
Yu Huang
Keyword(s):
Simulated Annealing
◽
Test Scheduling
◽
Soc Test
Download Full-text
Static pin mapping and SOC test scheduling for cores with multiple test sets
Fourth International Symposium on Quality Electronic Design, 2003. Proceedings.
◽
10.1109/isqed.2003.1194716
◽
2004
◽
Cited By ~ 13
Author(s):
Yu Huang
◽
Wu-Tung Cheng
◽
Chien-Chung Tsai
◽
N. Mukherjee
◽
S.M. Reddy
Keyword(s):
Test Scheduling
◽
Multiple Test
◽
Soc Test
◽
Test Sets
Download Full-text
Partition Based SoC Test Scheduling with Thermal and Power Constraints under Deep Submicron Technologies
2009 Asian Test Symposium
◽
10.1109/ats.2009.15
◽
2009
◽
Cited By ~ 17
Author(s):
Chunhua Yao
◽
Kewal K. Saluja
◽
Parameswaran Ramanathan
Keyword(s):
Deep Submicron
◽
Test Scheduling
◽
Power Constraints
◽
Soc Test
Download Full-text
Core-based SoC test scheduling using evolutionary algorithm
The 2003 Congress on Evolutionary Computation, 2003. CEC '03.
◽
10.1109/cec.2003.1299880
◽
2004
◽
Author(s):
Yu Xia
◽
M. Chrzanowska-Jeske
◽
Benyi Wang
Keyword(s):
Evolutionary Algorithm
◽
Test Scheduling
◽
Soc Test
Download Full-text
NoC-Based SoC Test Scheduling Using Ant Colony Optimization
ETRI Journal
◽
10.4218/etrij.08.0107.0090
◽
2008
◽
Vol 30
(1)
◽
pp. 129-140
◽
Cited By ~ 6
Author(s):
Jin-Ho Ahn
◽
Sungho Kang
Keyword(s):
Ant Colony Optimization
◽
Ant Colony
◽
Test Scheduling
◽
Soc Test
Download Full-text
An Improved SoC Test Scheduling Method Based on Simulated Annealing Algorithm
Journal of Physics Conference Series
◽
10.1088/1742-6596/806/1/012011
◽
2017
◽
Vol 806
◽
pp. 012011
Author(s):
Jingjing Zheng
◽
Zhihang Shen
◽
Huaien Gao
◽
Bianna Chen
◽
Weida Zheng
◽
...
Keyword(s):
Simulated Annealing
◽
Simulated Annealing Algorithm
◽
Test Scheduling
◽
Soc Test
◽
Scheduling Method
◽
Annealing Algorithm
Download Full-text
Defect-aware SOC test scheduling
22nd IEEE VLSI Test Symposium, 2004. Proceedings.
◽
10.1109/vtest.2004.1299265
◽
2004
◽
Cited By ~ 25
Author(s):
E. Larsson
◽
J. Pouget
◽
Zebo Peng
Keyword(s):
Test Scheduling
◽
Soc Test
Download Full-text
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