22nd IEEE VLSI Test Symposium, 2004. Proceedings.
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Feature extraction based built-in alternate test of RF components using a noise reference

22nd IEEE VLSI Test Symposium, 2004. Proceedings. ◽

10.1109/vtest.2004.1299254 ◽

2004 ◽

Cited By ~ 28

Author(s):

S.S. Akbay ◽

A. Chatterjee

Keyword(s):

Feature Extraction ◽

Rf Components ◽

Alternate Test

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The pros and cons of very-low-voltage testing: an analysis based on resistive bridging faults

22nd IEEE VLSI Test Symposium, 2004. Proceedings. ◽

10.1109/vtest.2004.1299240 ◽

2004 ◽

Cited By ~ 21

Author(s):

P. Engelke ◽

I. Polian ◽

M. Renovell ◽

B. Seshadri ◽

B. Becker

Keyword(s):

Low Voltage ◽

Bridging Faults ◽

Pros And Cons

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Design of wireless sub-micron characterization system

22nd IEEE VLSI Test Symposium, 2004. Proceedings. ◽

10.1109/vtest.2004.1299262 ◽

2004 ◽

Cited By ~ 7

Author(s):

B. Moore ◽

C. Backhouse ◽

M. Margala

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3-stage variable length continuous-flow scan vector decompression scheme

22nd IEEE VLSI Test Symposium, 2004. Proceedings. ◽

10.1109/vtest.2004.1299229 ◽

2004 ◽

Cited By ~ 22

Author(s):

C.V. Krishna ◽

N.A. Touba

Keyword(s):

Continuous Flow ◽

Variable Length

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An on-chip transfer function characterization system for analog built-in testing

22nd IEEE VLSI Test Symposium, 2004. Proceedings. ◽

10.1109/vtest.2004.1299252 ◽

2004 ◽

Cited By ~ 6

Author(s):

A. Valdes-Garcia ◽

J. Silva-Martinez ◽

E. Sanchez-Sinencio

Keyword(s):

Transfer Function ◽

Function Characterization ◽

On Chip

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BIST technique by equally spaced test vector sequences

22nd IEEE VLSI Test Symposium, 2004. Proceedings. ◽

10.1109/vtest.2004.1299245 ◽

2004 ◽

Cited By ~ 3

Author(s):

S. Manich ◽

L. Garcia ◽

L. Balado ◽

E. Lupon ◽

J. Rius ◽

...

Keyword(s):

Test Vector ◽

Vector Sequences

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When digital becomes analog -interfaces in high speed test

22nd IEEE VLSI Test Symposium, 2004. Proceedings. ◽

10.1109/vtest.2004.1299212 ◽

2004 ◽

Author(s):

W. Maichen

Keyword(s):

High Speed ◽

Speed Test

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Yield analysis of logic circuits

22nd IEEE VLSI Test Symposium, 2004. Proceedings. ◽

10.1109/vtest.2004.1299232 ◽

2004 ◽

Cited By ~ 12

Author(s):

D. Appello ◽

A. Fudoli ◽

K. Giarda ◽

E. Gizdarski ◽

B. Mathew ◽

...

Keyword(s):

Logic Circuits ◽

Yield Analysis

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A multi-configuration strategy for an application dependent testing of FPGAs

22nd IEEE VLSI Test Symposium, 2004. Proceedings. ◽

10.1109/vtest.2004.1299239 ◽

2004 ◽

Cited By ~ 26

Author(s):

M.B. Tahoori ◽

E.J. McCluskey ◽

M. Renovell ◽

P. Faure

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Detection of temperature sensitive defects using ZTC

22nd IEEE VLSI Test Symposium, 2004. Proceedings. ◽

10.1109/vtest.2004.1299242 ◽

2004 ◽

Cited By ~ 5

Author(s):

E. Long ◽

W.R. Daasch ◽

R. Madge ◽

B. Benware

Keyword(s):

Temperature Sensitive

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22nd IEEE VLSI Test Symposium, 2004. Proceedings.Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Feature extraction based built-in alternate test of RF components using a noise reference

The pros and cons of very-low-voltage testing: an analysis based on resistive bridging faults

Design of wireless sub-micron characterization system

3-stage variable length continuous-flow scan vector decompression scheme

An on-chip transfer function characterization system for analog built-in testing

BIST technique by equally spaced test vector sequences

When digital becomes analog -interfaces in high speed test

Yield analysis of logic circuits

A multi-configuration strategy for an application dependent testing of FPGAs

Detection of temperature sensitive defects using ZTC

22nd IEEE VLSI Test Symposium, 2004. Proceedings.
Latest Publications