A new packaging technology using micro-solder bumps for high-speed photoreceivers

1992 ◽  
Vol 15 (4) ◽  
pp. 578-582 ◽  
Author(s):  
H. Tsunetsugu ◽  
K. Katsura ◽  
T. Hayashi ◽  
F. Ishitsuka ◽  
S. Hata
Keyword(s):  
High Speed ◽  
Packaging Technology ◽  
Solder Bumps

Flip Chip Underfill RF Characterization

2019 ◽  
Vol 2019 (1) ◽  
pp. 000243-000247
Author(s):  
Robert B. Paul ◽  
A. Ege Engin ◽  
Jerry Aguirre
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
High Speed ◽  
Flip Chip ◽  
Power Integrity ◽  
Cavity Resonators ◽  
Dielectric Characterization ◽  
Noise Coupling ◽  
Solder Bumps ◽  
Underfill Material

Abstract To develop reliable high-speed packages, characterization of the underfill material used in the flip-chip process has become of greater importance. The underfill, typically an epoxy resin-based material, offers thermal and structural benefits for the integrated circuit (IC) on package. With so many inputs and outputs (IOs) in close proximity to one another, the integrated circuits on package can have unexpected signal and power integrity issues. Furthermore, chip packages can support signals only up to the frequency where noise coupling (e.g., crosstalk, switching noise, etc.) leads to the malfunctioning of the system. Vertical interconnects, such as vias and solder bumps, are major sources of noise coupling. Inserting ground references between every signal net is not practical. For the solder bumps, the noise coupling depends on the permittivity of the underfill material. Therefore, characterizing the permittivity of the underfill material helps in predicting signal and power integrity issues. Such liquid or semi-viscous materials are commonly characterized from a simple fringe capacitance model of an open-ended coaxial probe immersed in the material. The open-ended coaxial method, however, is not as accurate as resonator-based methods. There is a need for a methodology to accurately extract the permittivity of liquid or semi-viscous materials at high frequencies. The proposed method uses solid walled cavity resonators, where the resonator is filled with the underfill material and cured. Dielectric characterization is a complex process, where the physical characteristics of the cavities must be known or accurately measured. This includes the conductivity of the conductors, roughness of the conductors, the dimensions of the cavity, and the port pin locations. This paper discusses some of the challenges that are encountered when characterizing dielectrics with cavity resonators. This characterization methodology can also be used to characterize other materials of interest.

High-speed SnAG Solder Electroplating Process and Developments on Cost Reduction

2011 ◽  
Vol 2011 (DPC) ◽  
pp. 000717-000753
Author(s):  
Bob Forman
Keyword(s):  
High Speed ◽  
Consumer Electronics ◽  
Wafer Level ◽  
Solder Bumps ◽  
New Process ◽  
Snag Solder ◽  
Single Use ◽  
Current Densities ◽  
Electroplating Process ◽  
Short Time

The use of wafer level packaged ICs with Lead (Pb) free Tin Silver (SnAg) solder bumps is prevalent in consumer electronics. One method of making these bumps is by electroplating. The current process requires the use of a complex and expensive, single use chemistry. These chemistries do provide smooth, void free bumps, but with a very high Cost of Ownership (COO). Up to now these chemistries were expensive to operate, mainly because they are used for a short time and then disposed. This paper will discuss a new process using chemistry that provides improved COO by incorporating higher plating rates with recycling of used chemistry. With this process it is possible to recover nearly 100% of the metals, acids and organic agents previously discharged as waste. The recovered chemistry is then processed and certified to be reused in the originating fab, resulting in virtually zero waste. In addition to closed loop recycling, the process also forms bumps at a higher rate, by plating at higher current densities, with no trade-off in bump performance.

A novel flip-chip interconnection technique using solder bumps for high-speed photoreceivers

1990 ◽  
Vol 8 (9) ◽  
pp. 1323-1327 ◽  
Author(s):  
K. Katsura ◽  
T. Hayashi ◽  
F. Ohira ◽  
S. Hata ◽  
K. Iwashita
Keyword(s):  
High Speed ◽  
Flip Chip ◽  
Solder Bumps

Development of high-speed 3D inspection system for solder bumps

1998 ◽  
Author(s):  
Youji Nishiyama ◽  
Hiroyuki Tsukahara ◽  
Yoshitaka Oshima ◽  
Fumiyuki Takahashi ◽  
Takashi Fuse ◽  
...  
Keyword(s):  
High Speed ◽  
Inspection System ◽  
Solder Bumps

Development of Lead Free Plating Chemical for Various Applications

2012 ◽  
Vol 2012 (DPC) ◽  
pp. 000944-000967
Author(s):  
Takeshi Hatta ◽  
Atsushi Ishikawa ◽  
Takuma Katase ◽  
Akihiro Masuda
Keyword(s):  
Chemical Stability ◽  
High Speed ◽  
Flip Chip ◽  
New Technologies ◽  
High Reliability ◽  
Lead Free ◽  
Current Status ◽  
Chip Technology ◽  
Solder Bumps ◽  
Pure Sn

Flip chip connection has been applied to a lot of applications to shorten the connection length for high performance. Solder bumping is one of the key technologies for flip chip connection, and its quality strongly brings large impact on the reliability after packaging. Electroplating is one of the methods to form solder bumps. And Sn-Ag is considered as the first candidate of lead free alloy for electroplating method. We have released Sn-Ag plating chemical and it has been used by many customers in the world. In the future, flip chip technology will progress to further miniaturization and high integration with the new technologies such as Cu pillar and Through Silicon Via (TSV). At that time, further variations of alloys are necessary for electroplating method to meet various requirements. Even for Sn-Ag plating chemical, higher plating rate is required to improve productivity in mass production. In this time, we have developed new Sn-Ag high speed plating chemical based on our conventional technology. Furthermore, we have succeeded to develop Pure Sn and Sn-Cu chemicals for bumping method to meet customer's requirement. Sn-Cu is considered as a good candidate for bumping alloy to achieve high reliability, but the chemical stability is not so good. Therefore, we successfully modified the Sn-Cu chemical and extended chemical stability. We will update our current status about high speed Sn-Ag plating chemical and other chemicals like Sn-Cu and pure Sn in this time. By using these binary alloy chemicals, we are able to produce Sn-Ag-Cu solder bumps by stacking Sn-Ag and Sn-Cu. And it can bring further variation for bumping alloys.

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