Proceedings of the 1997 international symposium on Physical design - ISPD '97
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The quarter micron challenge

Proceedings of the 1997 international symposium on Physical design - ISPD '97 ◽

10.1145/267665.267717 ◽

1997 ◽

Author(s):

Raul Camposano

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Slicibility of rectangular graphs and floorplan optimization

Proceedings of the 1997 international symposium on Physical design - ISPD '97 ◽

10.1145/267665.267706 ◽

1997 ◽

Cited By ~ 1

Author(s):

Partha S. Dasgupta ◽

Susmita Sur-Kolay

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C5M---a control logic layout synthesis system for high-performance microprocessors

Proceedings of the 1997 international symposium on Physical design - ISPD '97 ◽

10.1145/267665.267700 ◽

1997 ◽

Author(s):

Jeffrey L. Burns ◽

Jack A. Feldman

Keyword(s):

High Performance ◽

Control Logic ◽

Synthesis System ◽

Layout Synthesis

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Physical design challenges for performance

Proceedings of the 1997 international symposium on Physical design - ISPD '97 ◽

10.1145/267665.267727 ◽

1997 ◽

Cited By ~ 4

Author(s):

David P. LaPotin ◽

Uttam Ghoshal ◽

Eli Chiprout ◽

Sani R. Nassif

Keyword(s):

Physical Design ◽

Design Challenges

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A VLSI artwork legalization technique based on a new criterion of minimum layout perturbation

Proceedings of the 1997 international symposium on Physical design - ISPD '97 ◽

10.1145/267665.267701 ◽

1997 ◽

Cited By ~ 21

Author(s):

Fook-Luen Heng ◽

Zhan Chen ◽

Gustavo E. Tellez

Keyword(s):

New Criterion

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Concurrent transistor sizing and buffer insertion by considering cost-delay tradeoffs

Proceedings of the 1997 international symposium on Physical design - ISPD '97 ◽

10.1145/267665.267703 ◽

1997 ◽

Cited By ~ 2

Author(s):

Juho Kim ◽

Cyrus Bamji ◽

Yanbin Jiang ◽

Sachin Sapatnekar

Keyword(s):

Buffer Insertion ◽

Transistor Sizing

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Power optimization for FPGA look-up tables

Proceedings of the 1997 international symposium on Physical design - ISPD '97 ◽

10.1145/267665.267707 ◽

1997 ◽

Cited By ~ 9

Author(s):

Michael J. Alexander

Keyword(s):

Power Optimization

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Closed form solution to simultaneous buffer insertion/sizing and wire sizing

Proceedings of the 1997 international symposium on Physical design - ISPD '97 ◽

10.1145/267665.267712 ◽

1997 ◽

Cited By ~ 33

Author(s):

Chris C. N. Chu ◽

D. F. Wong

Keyword(s):

Closed Form ◽

Closed Form Solution ◽

Form Solution ◽

Buffer Insertion ◽

Wire Sizing

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A matrix synthesis approach to thermal placement

Proceedings of the 1997 international symposium on Physical design - ISPD '97 ◽

10.1145/267665.267708 ◽

1997 ◽

Cited By ~ 30

Author(s):

Chris C. N. Chu ◽

D. F. Wong

Keyword(s):

Matrix Synthesis ◽

Synthesis Approach

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Towards a new benchmarking paradigm in EDA

Proceedings of the 1997 international symposium on Physical design - ISPD '97 ◽

10.1145/267665.267704 ◽

1997 ◽

Cited By ~ 8

Author(s):

Nevin Kapur ◽

Debabrata Ghosh ◽

Franc Brglez

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Proceedings of the 1997 international symposium on Physical design - ISPD '97Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

The quarter micron challenge

Slicibility of rectangular graphs and floorplan optimization

C5M---a control logic layout synthesis system for high-performance microprocessors

Physical design challenges for performance

A VLSI artwork legalization technique based on a new criterion of minimum layout perturbation

Concurrent transistor sizing and buffer insertion by considering cost-delay tradeoffs

Power optimization for FPGA look-up tables

Closed form solution to simultaneous buffer insertion/sizing and wire sizing

A matrix synthesis approach to thermal placement

Towards a new benchmarking paradigm in EDA

Proceedings of the 1997 international symposium on Physical design - ISPD '97
Latest Publications