Processing and Characterization of Thousand-Hour 500 °C Durable 4H-SiC JFET Integrated Circuits

2016 ◽  
Vol 2016 (HiTEC) ◽  
pp. 000249-000256 ◽  
Author(s):  
David J. Spry ◽  
Philip G. Neudeck ◽  
Liang-Yu Chen ◽  
Dorothy Lukco ◽  
Carl W. Chang ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Ohmic Contacts ◽  
Combustion Engine ◽  
Well Drilling ◽  
Deep Well ◽  
Operational Testing ◽  
And Control ◽  
Technology Foundation

Abstract This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 °C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over ~ 1-μm scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 °C operational testing. These results advance the technology foundation for realizing long-term durable 500 °C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

Year-long 500°C Operational Demonstration of Up-scaled 4H-SiC JFET Integrated Circuits

2018 ◽  
Vol 15 (4) ◽  
pp. 163-170 ◽  
Author(s):  
Philip G. Neudeck ◽  
David J. Spry ◽  
Michael J. Krasowski ◽  
Norman F. Prokop ◽  
Glenn M. Beheim ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Combustion Engine ◽  
Circuit Complexity ◽  
Fold Increase ◽  
Ring Oscillator ◽  
Well Drilling ◽  
Deep Well ◽  
Air Atmosphere ◽  
And Control

Abstract This work describes recent progress in the design, processing, and testing of significantly up-scaled complex 500°C–durable 4H-SiC junction field effect transistor (JFET) integrated circuit (IC) technology with two-level interconnect undergoing development at NASA Glenn Research Center. For the first time, stable electrical operation of semiconductor ICs for more than 1 y at 500°C in an air atmosphere is reported. These groundbreaking durability results were attained on two-level interconnect JFET demonstration ICs with 175 or more transistors on each chip. This corresponds to a more than 7-fold increase in 500°C–durable circuit complexity from the 24-transistor ring oscillator ICs reported at HiTEC 2016. These results advance the technology foundation for realizing long-term durable 500°C ICs with increased functional capability for combustion engine sensing and control, planetary exploration, deep-well drilling monitoring, and other harsh-environment applications.

Yearlong 500 °C Operational Demonstration of Up-scaled 4H-SiC JFET Integrated Circuits

2018 ◽  
Vol 2018 (HiTEC) ◽  
pp. 000071-000078 ◽  
Author(s):  
Philip G. Neudeck ◽  
David J. Spry ◽  
Michael J. Krasowski ◽  
Norman F. Prokop ◽  
Glenn M. Beheim ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Combustion Engine ◽  
Circuit Complexity ◽  
Fold Increase ◽  
Ring Oscillator ◽  
Well Drilling ◽  
Deep Well ◽  
Air Atmosphere ◽  
One Year

Abstract This work describes recent progress in the design, processing, and testing of significantly up-scaled 500 °C durable 4H-SiC junction field effect transistor (JFET) integrated circuit (IC) technology with two-level interconnect undergoing development at NASA Glenn Research Center. For the first time, stable electrical operation of semiconductor ICs for over one year at 500 °C in air atmosphere is reported. These groundbreaking durability results were attained on two-level interconnect JFET demonstration ICs with 175 or more transistors on each chip. This corresponds to a more than 7-fold increase in 500 °C-durable circuit complexity from the 24 transistor ring oscillator ICs reported at HiTEC 2016 [1]. These results advance the technology foundation for realizing long-term durable 500 °C ICs with increased functional capability for combustion engine sensing and control, planetary exploration, deep-well drilling monitoring, and other harsh-environment applications.

Design and Calibration of Resistive Stress Sensors on 4H Silicon Carbide

2018 ◽  
Author(s):  
Richard C. Jaeger ◽  
Jun Chen ◽  
Jeffrey C. Suhling ◽  
Leonid Fursin
Keyword(s):  
Silicon Carbide ◽  
Integrated Circuits ◽  
Stress Sensitivity ◽  
Well Drilling ◽  
Deep Well ◽  
Stress Sensors ◽  
Wide Range ◽  
Higher Temperature ◽  
Van Der Pauw ◽  
Transverse Piezoresistance

Stress sensors have shown potential to provide “health monitoring” of a wide range of issues related to packaging of integrated circuits, and silicon carbide offers the advantage of much higher temperature sensor operation with application in packaged high-voltage, high-power SiC devices as well as both automotive and aerospace systems, geothermal plants, and deep well drilling, to name a few. This paper discusses the theory and uniaxial calibration of resistive stress sensors on 4H silicon carbide (4H-SiC) and provides new theoretical descriptions for four-element resistor rosettes and van der Pauw (VDP) stress sensors. The results delineate the similarities and differences relative to those on (100) silicon: resistors on the silicon face of 4H-SiC respond to only four of the six components of the stress state; a four-element rosette design exists for measuring the in-plane stress components; two stress quantities can be measured in a temperature compensated manner. In contrast to silicon, only one combined coefficient is required for temperature compensated stress measurements. Calibration results from a single VDP device can be used to calculate the basic lateral and transverse piezoresistance coefficients for 4H-SiC material. Experimental results are presented for lateral and transverse piezoresistive coefficients for van der Pauw structures and p- and n-type resistors. The VDP devices exhibit the expected 3.16 times higher stress sensitivity than standard resistor rosettes.

Long term developments in switching

1978 ◽  
Vol 289 (1356) ◽  
pp. 65-77
Keyword(s):  
Integrated Circuits ◽  
Distributed Control ◽  
Optical Transmission ◽  
Digital Transmission ◽  
Control Techniques ◽  
Control Functions ◽  
Open Questions ◽  
The Common ◽  
And Control

Developments are considered under the headings (i) connection techniques, (ii) control techniques, (hi) interaction of switching and transmission techniques, (iv) facilities offered, and (v) connecting network topology. In each topic, there are open questions. The major forecasts are: (i) the extensive use of electronic digital multiplex connecting networks, compatible with digital transmission systems; (ii) the introduction of optical connecting techniques, which offer both compatibility with optical transmission and some interesting new possibilities for the size and configuration of switches; (iii) the extensive use of stored program control; (iv) the supplementation of central processors by distributed control techniques for the common operational procedures, probably using microprocessors; and (v) the widespread use of semiconductor integrated circuits both for connection and control functions.

scholarly journals Identification and molecular characterization of SIV Vpr R50G mutation associated with long term survival in SIV-infected morphine dependent and control macaques

Virology ◽  
2013 ◽  
Vol 446 (1-2) ◽  
pp. 144-151 ◽  
Author(s):  
Ivelisse Rivera ◽  
Yashira García ◽  
Mohitkumar R. Gangwani ◽  
Richard J. Noel ◽  
Lucianette Maldonado ◽  
...  
Keyword(s):  
Molecular Characterization ◽  
Term Survival ◽  
Long Term Survival ◽  
And Control

scholarly journals A Manual Well Drilling Pilot Project: Implementing the Water for All International Method

2010 ◽  
Vol 5 (1) ◽  
pp. 128-147
Author(s):  
Alison M. Forsyth ◽  
Eshwan Ramudu ◽  
Helen Louise Hindal ◽  
Dana R. Lazarus
Keyword(s):  
Rural Community ◽  
Pilot Project ◽  
Development Project ◽  
Well Drilling ◽  
Chemical Contaminants ◽  
Water Testing ◽  
Deep Well ◽  
Resistivity Method ◽  
Drilling Method

We established a manual well-drilling pilot project based on the Water for All International drilling method in a small rural community in the Dominican Republic. Water testing for determining the level of biological and chemical contaminants was used to better assess the water needs of the community.  For geophysical exploration, an experimental resistivity method and survey of existing wells provided information to better optimize the drilling location.  With this information a pilot well site was selected in Tireo Abajo, and over the course of a week a 9 meter-deep well was successfully drilled, cased, and conditioned. The partner family and as many as 40 other members of the community helped to develop and implement this method during every stage of the process. This suggests the potential for a long-term development project that could benefit their community.

6H-SiC Lateral JFETs for Analog Integrated Circuits

2008 ◽  
Vol 600-603 ◽  
pp. 1099-1102 ◽  
Author(s):  
Xiao An Fu ◽  
Amita Patil ◽  
Philip G. Neudeck ◽  
Glenn M. Beheim ◽  
Steven Garverick ◽  
...  
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Power Systems ◽  
Field Effect Transistors ◽  
Electrical Characterization ◽  
Analog Integrated Circuits ◽  
High Gain ◽  
High Temperature Sensor ◽  
And Control

This paper reports fabrication and electrical characterization of 6H-SiC n-channel, depletion-mode, junction-field-effect transistors (JFETs) for use in high-temperature analog integrated circuits for sensing and control in propulsion, power systems, and geothermal exploration. Electrical characteristics of the resulting JFET devices have been measured across the wafer as a function of temperature, from room temperature to 450oC. The results indicate that the JFETs are suitable for high-gain amplifiers in high-temperature sensor signal processing circuits.

Long-Term Characterization of 6H-SiC Transistor Integrated Circuit Technology Operating at 500 °C

2008 ◽  
Vol 1069 ◽  
Author(s):  
Philip Neudeck ◽  
David J. Spry ◽  
Liang-Yu Chen ◽  
Carl W. Chang ◽  
Glenn M. Beheim ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Field Effect Transistors ◽  
Aircraft Engines ◽  
Electrical Parameters ◽  
Air Atmosphere ◽  
Circuit Technology ◽  
Very High

ABSTRACTNASA has been developing very high temperature semiconductor integrated circuits for use in the hot sections of aircraft engines and for Venus exploration. This paper reports on long-term 500 °C electrical operation of prototype 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). As of this writing, some devices have surpassed 4000 hours of continuous 500 °C electrical operation in oxidizing air atmosphere with minimal change in relevant electrical parameters.

Effects of BEOL Stack on Thermal Mechanical Stress of Cu Lines

2006 ◽  
Vol 914 ◽  
Author(s):  
Seung-Hyun Rhee ◽  
Conal E. Murray ◽  
Paul R. Besser
Keyword(s):  
Thermal Stress ◽  
Integrated Circuits ◽  
Structural Integrity ◽  
Dielectric Material ◽  
Dielectric Materials ◽  
X Ray Diffraction ◽  
And Control ◽  
Measurement And Control ◽  
Low K

AbstractThe measurement and control of the stress state in BEOL interconnects are important to ensure structural integrity and long term reliability of integrated circuits. Thermal stress in interconnects is determined by the thermal-mechanical properties of Cu lines, substrate, and dielectric materials. The effect of BEOL stacks on thermal stress characteristics of Cu lines were investigated using X-ray diffraction stress measurements. The stress characteristics of M1 and M4 level interconnects in full low-k and low-k/oxide hybrid dielectric stacks were evaluated, and the results indicated reduced substrate confinement and an increased impact of the dielectric material on in-plane stresses in higher level interconnects. The effects of dielectric stack and material properties were examined and the implication in the stresses of multilevel interconnects are discussed.

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